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gpu: nvgpu: Pull latest gp10b headers
HWCL 38000754 Bug 1819874 Change-Id: Ic28bd2abee4caac83c2d21b035a64558d72aa0fa Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com> Reviewed-on: http://git-master/r/1301674 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -258,6 +258,14 @@ static inline u32 ctxsw_prog_main_image_misc_options_verif_features_disabled_f(v
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{
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return 0x0;
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}
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static inline u32 ctxsw_prog_main_image_pmu_options_o(void)
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{
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return 0x00000070;
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}
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static inline u32 ctxsw_prog_main_image_pmu_options_boost_clock_frequencies_f(u32 v)
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{
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return (v & 0x1) << 0;
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}
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static inline u32 ctxsw_prog_main_image_graphics_preemption_options_o(void)
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{
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return 0x00000080;
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -124,7 +124,7 @@ static inline u32 fuse_status_opt_fbp_r(void)
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}
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static inline u32 fuse_status_opt_fbp_idx_v(u32 r, u32 i)
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{
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return (r >> (0 + i*0)) & 0x1;
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return (r >> (0 + i*1)) & 0x1;
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}
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static inline u32 fuse_opt_ecc_en_r(void)
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{
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -2534,6 +2534,18 @@ static inline u32 gr_gpcs_tpcs_tex_rm_cb_1_valid_true_f(void)
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{
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return 0x80000000;
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}
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static inline u32 gr_gpcs_tpcs_tex_m_dbg2_r(void)
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{
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return 0x00419a3c;
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}
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static inline u32 gr_gpcs_tpcs_tex_m_dbg2_lg_rd_coalesce_en_f(u32 v)
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{
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return (v & 0x1) << 2;
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}
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static inline u32 gr_gpcs_tpcs_tex_m_dbg2_lg_rd_coalesce_en_m(void)
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{
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return 0x1 << 2;
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}
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static inline u32 gr_gpccs_falcon_addr_r(void)
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{
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return 0x0041a0ac;
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