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gpu: nvgpu: fix misra 10.5 violations

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MISRA Advisory Rule 10.5 states that the value of an expression should
not be cast to an inappropriate essential type.

This change eliminates such a violation in the posix implementation
of nvgpu_thread_cleanup_pop().

Jira NVGPU-3178

Change-Id: I2ad363b4d60c321fa20b23c167d783bebaceb7d3
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2298986
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Scott Long
2020-02-18 09:49:13 -08:00
committed by Alex Waterman
parent 1f9f28df8c
commit 4fd8df5ca0
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/nvgpu/include/nvgpu/posix/thread.h
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@@ -52,7 +52,7 @@
/**
* @brief Macro to pop the thread cancellation cleanup handler.
*/
#define nvgpu_thread_cleanup_pop() pthread_cleanup_pop((bool)true)
#define nvgpu_thread_cleanup_pop() pthread_cleanup_pop((bool)1)
/**
* Returns the PID of the calling process.