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gpu: nvgpu: fix MISRA 15.7 violation in gr.config unit

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Below MISRA 15.7 violation is reported in common.gr.config unit

nvgpu/drivers/gpu/nvgpu/common/gr/gr_config.c:169:
misra_violation: No non-empty terminating "else" statement.

Fix this by adding terminating "else" statement

Jira NVGPU-3225

Change-Id: Iaec3d6595da8fca55dfad8a8ccbcbad2ba7b1fe1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2110987
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2019-05-02 15:38:32 +05:30
committed by mobile promotions
parent 3b0062bbd9
commit 510b6cc8b2
1 changed files with 2 additions and 1 deletions
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3
drivers/gpu/nvgpu/common/gr/gr_config.c
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@@ -165,7 +165,6 @@ struct nvgpu_gr_config *nvgpu_gr_config_init(struct gk20a *g)
config->ppc_count += config->gpc_ppc_count[gpc_index];
gpc_new_skip_mask = 0;
if (config->pe_count_per_gpc > 1U &&
config->pes_tpc_count[0][gpc_index] +
config->pes_tpc_count[1][gpc_index] == 5U) {
@@ -191,6 +190,8 @@ struct nvgpu_gr_config *nvgpu_gr_config_init(struct gk20a *g)
config->pes_tpc_mask[pes_heavy_index][gpc_index] ^
(config->pes_tpc_mask[pes_heavy_index][gpc_index] &
(config->pes_tpc_mask[pes_heavy_index][gpc_index] - 1U));
} else {
gpc_new_skip_mask = 0U;
}
config->gpc_skip_mask[gpc_index] = gpc_new_skip_mask;
}