gpu: nvgpu: vgpu: add vgpu_ivc_* wrappers

tegra_gr_comm_* are wrapped as vgpu_ivc_*, which helps make vgpu code
more common.

Jira EVLR-2364

Change-Id: Id49462ed6c176c73ceee8c6bc41104447748e187
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1645656
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/Makefile

@@ -180,7 +180,8 @@ nvgpu-$(CONFIG_TEGRA_GR_VIRTUALIZATION) += \
 	common/linux/vgpu/clk_vgpu.o \
 	common/linux/vgpu/css_vgpu.o \
 	common/linux/vgpu/gm20b/vgpu_gr_gm20b.o \
-	common/linux/vgpu/sysfs_vgpu.o
+	common/linux/vgpu/sysfs_vgpu.o \
+	common/linux/vgpu/vgpu_ivc.o
 
 nvgpu-$(CONFIG_COMMON_CLK) += \
 	common/linux/clk.o

drivers/gpu/nvgpu/common/linux/vgpu/dbg_vgpu.c

@@ -14,7 +14,8 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-#include <linux/tegra_gr_comm.h>
+#include <nvgpu/vgpu/vgpu_ivc.h>
+
 #include <linux/tegra_vgpu.h>
 #include <uapi/linux/nvgpu.h>
 
@@ -42,7 +43,7 @@ int vgpu_exec_regops(struct dbg_session_gk20a *dbg_s,
 	gk20a_dbg_fn("");
 	BUG_ON(sizeof(*ops) != sizeof(struct tegra_vgpu_reg_op));
 
-	handle = tegra_gr_comm_oob_get_ptr(tegra_gr_comm_get_server_vmid(),
+	handle = vgpu_ivc_oob_get_ptr(vgpu_ivc_get_server_vmid(),
 					TEGRA_VGPU_QUEUE_CMD,
 					&oob, &oob_size);
 	if (!handle)
@@ -68,7 +69,7 @@ int vgpu_exec_regops(struct dbg_session_gk20a *dbg_s,
 		memcpy(ops, oob, ops_size);
 
 fail:
-	tegra_gr_comm_oob_put_ptr(handle);
+	vgpu_ivc_oob_put_ptr(handle);
 	return err;
 }
 

drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.c

@@ -499,7 +499,7 @@ static int vgpu_submit_runlist(struct gk20a *g, u64 handle, u8 runlist_id,
 	void *oob;
 	size_t size, oob_size;
 
-	oob_handle = tegra_gr_comm_oob_get_ptr(tegra_gr_comm_get_server_vmid(),
+	oob_handle = vgpu_ivc_oob_get_ptr(vgpu_ivc_get_server_vmid(),
 			TEGRA_VGPU_QUEUE_CMD,
 			&oob, &oob_size);
 	if (!oob_handle)
@@ -523,7 +523,7 @@ static int vgpu_submit_runlist(struct gk20a *g, u64 handle, u8 runlist_id,
 	err = (err || msg.ret) ? -1 : 0;
 
 done:
-	tegra_gr_comm_oob_put_ptr(oob_handle);
+	vgpu_ivc_oob_put_ptr(oob_handle);
 	return err;
 }
 

drivers/gpu/nvgpu/common/linux/vgpu/gp10b/vgpu_mm_gp10b.c

@@ -95,7 +95,7 @@ u64 vgpu_gp10b_locked_gmmu_map(struct vm_gk20a *vm,
 		}
 	}
 
-	handle = tegra_gr_comm_oob_get_ptr(tegra_gr_comm_get_server_vmid(),
+	handle = vgpu_ivc_oob_get_ptr(vgpu_ivc_get_server_vmid(),
 					TEGRA_VGPU_QUEUE_CMD,
 					(void **)&mem_desc, &oob_size);
 	if (!handle) {
@@ -179,11 +179,11 @@ u64 vgpu_gp10b_locked_gmmu_map(struct vm_gk20a *vm,
 
 	/* TLB invalidate handled on server side */
 
-	tegra_gr_comm_oob_put_ptr(handle);
+	vgpu_ivc_oob_put_ptr(handle);
 	return map_offset;
 fail:
 	if (handle)
-		tegra_gr_comm_oob_put_ptr(handle);
+		vgpu_ivc_oob_put_ptr(handle);
 	nvgpu_err(g, "Failed: err=%d, msg.ret=%d", err, msg.ret);
 	nvgpu_err(g,
 		  "  Map: %-5s GPU virt %#-12llx +%#-9llx "

drivers/gpu/nvgpu/common/linux/vgpu/gr_vgpu.c

@@ -1121,7 +1121,7 @@ static int vgpu_gr_suspend_resume_contexts(struct gk20a *g,
 	nvgpu_mutex_acquire(&g->dbg_sessions_lock);
 	nvgpu_mutex_acquire(&dbg_s->ch_list_lock);
 
-	handle = tegra_gr_comm_oob_get_ptr(tegra_gr_comm_get_server_vmid(),
+	handle = vgpu_ivc_oob_get_ptr(vgpu_ivc_get_server_vmid(),
 			TEGRA_VGPU_QUEUE_CMD,
 			(void **)&oob, &oob_size);
 	if (!handle) {
@@ -1166,7 +1166,7 @@ static int vgpu_gr_suspend_resume_contexts(struct gk20a *g,
 
 done:
 	if (handle)
-		tegra_gr_comm_oob_put_ptr(handle);
+		vgpu_ivc_oob_put_ptr(handle);
 	nvgpu_mutex_release(&dbg_s->ch_list_lock);
 	nvgpu_mutex_release(&g->dbg_sessions_lock);
 	*ctx_resident_ch_fd = channel_fd;
@@ -1238,7 +1238,7 @@ int vgpu_gr_init_sm_id_table(struct gk20a *g)
 		return err;
 	}
 
-	handle = tegra_gr_comm_oob_get_ptr(tegra_gr_comm_get_server_vmid(),
+	handle = vgpu_ivc_oob_get_ptr(vgpu_ivc_get_server_vmid(),
 					   TEGRA_VGPU_QUEUE_CMD,
 					   (void **)&entry, &oob_size);
 	if (!handle)
@@ -1261,7 +1261,7 @@ int vgpu_gr_init_sm_id_table(struct gk20a *g)
 		sm_info->sm_index = entry->sm_index;
 		sm_info->global_tpc_index = entry->global_tpc_index;
 	}
-	tegra_gr_comm_oob_put_ptr(handle);
+	vgpu_ivc_oob_put_ptr(handle);
 
 	return 0;
 }

drivers/gpu/nvgpu/common/linux/vgpu/vgpu.c

@@ -21,6 +21,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/pm_runtime.h>
 #include <linux/pm_qos.h>
+#include <linux/platform_device.h>
 #include <soc/tegra/chip-id.h>
 #include <uapi/linux/nvgpu.h>
 
@@ -49,11 +50,11 @@
 
 #include <nvgpu/hw/gk20a/hw_mc_gk20a.h>
 
-static inline int vgpu_comm_init(struct platform_device *pdev)
+static inline int vgpu_comm_init(struct gk20a *g)
 {
 	size_t queue_sizes[] = { TEGRA_VGPU_QUEUE_SIZES };
 
-	return tegra_gr_comm_init(pdev, 3, queue_sizes, TEGRA_VGPU_QUEUE_CMD,
+	return vgpu_ivc_init(g, 3, queue_sizes, TEGRA_VGPU_QUEUE_CMD,
 				ARRAY_SIZE(queue_sizes));
 }
 
@@ -61,7 +62,7 @@ static inline void vgpu_comm_deinit(void)
 {
 	size_t queue_sizes[] = { TEGRA_VGPU_QUEUE_SIZES };
 
-	tegra_gr_comm_deinit(TEGRA_VGPU_QUEUE_CMD, ARRAY_SIZE(queue_sizes));
+	vgpu_ivc_deinit(TEGRA_VGPU_QUEUE_CMD, ARRAY_SIZE(queue_sizes));
 }
 
 int vgpu_comm_sendrecv(struct tegra_vgpu_cmd_msg *msg, size_t size_in,
@@ -72,12 +73,12 @@ int vgpu_comm_sendrecv(struct tegra_vgpu_cmd_msg *msg, size_t size_in,
 	void *data = msg;
 	int err;
 
-	err = tegra_gr_comm_sendrecv(tegra_gr_comm_get_server_vmid(),
+	err = vgpu_ivc_sendrecv(vgpu_ivc_get_server_vmid(),
 				TEGRA_VGPU_QUEUE_CMD, &handle, &data, &size);
 	if (!err) {
 		WARN_ON(size < size_out);
 		memcpy(msg, data, size_out);
-		tegra_gr_comm_release(handle);
+		vgpu_ivc_release(handle);
 	}
 
 	return err;
@@ -149,7 +150,7 @@ static int vgpu_intr_thread(void *dev_id)
 		size_t size;
 		int err;
 
-		err = tegra_gr_comm_recv(TEGRA_VGPU_QUEUE_INTR, &handle,
+		err = vgpu_ivc_recv(TEGRA_VGPU_QUEUE_INTR, &handle,
 					(void **)&msg, &size, &sender);
 		if (err == -ETIME)
 			continue;
@@ -157,7 +158,7 @@ static int vgpu_intr_thread(void *dev_id)
 			continue;
 
 		if (msg->event == TEGRA_VGPU_EVENT_ABORT) {
-			tegra_gr_comm_release(handle);
+			vgpu_ivc_release(handle);
 			break;
 		}
 
@@ -193,7 +194,7 @@ static int vgpu_intr_thread(void *dev_id)
 			break;
 		}
 
-		tegra_gr_comm_release(handle);
+		vgpu_ivc_release(handle);
 	}
 
 	while (!nvgpu_thread_should_stop(&priv->intr_handler))
@@ -225,7 +226,7 @@ static void vgpu_remove_support(struct gk20a *g)
 		g->mm.remove_support(&g->mm);
 
 	msg.event = TEGRA_VGPU_EVENT_ABORT;
-	err = tegra_gr_comm_send(TEGRA_GR_COMM_ID_SELF, TEGRA_VGPU_QUEUE_INTR,
+	err = vgpu_ivc_send(vgpu_ivc_get_peer_self(), TEGRA_VGPU_QUEUE_INTR,
 				&msg, sizeof(msg));
 	WARN_ON(err);
 	nvgpu_thread_stop(&priv->intr_handler);
@@ -699,7 +700,7 @@ int vgpu_probe(struct platform_device *pdev)
 		}
 	}
 
-	err = vgpu_comm_init(pdev);
+	err = vgpu_comm_init(gk20a);
 	if (err) {
 		dev_err(dev, "failed to init comm interface\n");
 		return -ENOSYS;

drivers/gpu/nvgpu/common/linux/vgpu/vgpu.h

@@ -1,7 +1,7 @@
 /*
  * Virtualized GPU Interfaces
  *
- * Copyright (c) 2014-2017, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2018, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -26,7 +26,8 @@ struct tegra_vgpu_cmd_msg;
 struct gk20a_platform;
 
 #ifdef CONFIG_TEGRA_GR_VIRTUALIZATION
-#include <linux/tegra_gr_comm.h>
+#include <nvgpu/vgpu/vgpu_ivc.h>
+
 #include <linux/tegra_vgpu.h>
 #include "gk20a/gk20a.h"
 #include "common/linux/platform_gk20a.h"

drivers/gpu/nvgpu/common/linux/vgpu/vgpu_ivc.c

@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2018, NVIDIA Corporation.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <nvgpu/types.h>
+#include <linux/tegra_gr_comm.h>
+
+#include "common/linux/os_linux.h"
+
+int vgpu_ivc_init(struct gk20a *g, u32 elems,
+		const size_t *queue_sizes, u32 queue_start, u32 num_queues)
+{
+	struct platform_device *pdev = to_platform_device(dev_from_gk20a(g));
+
+	return tegra_gr_comm_init(pdev, elems, queue_sizes, queue_start,
+				num_queues);
+}
+
+void vgpu_ivc_deinit(u32 queue_start, u32 num_queues)
+{
+	tegra_gr_comm_deinit(queue_start, num_queues);
+}
+
+void vgpu_ivc_release(void *handle)
+{
+	tegra_gr_comm_release(handle);
+}
+
+u32 vgpu_ivc_get_server_vmid(void)
+{
+	return tegra_gr_comm_get_server_vmid();
+}
+
+int vgpu_ivc_recv(u32 index, void **handle, void **data,
+				size_t *size, u32 *sender)
+{
+	return tegra_gr_comm_recv(index, handle, data, size, sender);
+}
+
+int vgpu_ivc_send(u32 peer, u32 index, void *data, size_t size)
+{
+	return tegra_gr_comm_send(peer, index, data, size);
+}
+
+int vgpu_ivc_sendrecv(u32 peer, u32 index, void **handle,
+				void **data, size_t *size)
+{
+	return tegra_gr_comm_sendrecv(peer, index, handle, data, size);
+}
+
+u32 vgpu_ivc_get_peer_self(void)
+{
+	return TEGRA_GR_COMM_ID_SELF;
+}
+
+void *vgpu_ivc_oob_get_ptr(u32 peer, u32 index, void **ptr,
+					size_t *size)
+{
+	return tegra_gr_comm_oob_get_ptr(peer, index, ptr, size);
+}
+
+void vgpu_ivc_oob_put_ptr(void *handle)
+{
+	tegra_gr_comm_oob_put_ptr(handle);
+}

drivers/gpu/nvgpu/include/nvgpu/vgpu/vgpu_ivc.h

@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2018, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __VGPU_IVC_H__
+#define __VGPU_IVC_H__
+
+#include <nvgpu/types.h>
+
+struct gk20a;
+
+int vgpu_ivc_init(struct gk20a *g, u32 elems,
+		const size_t *queue_sizes, u32 queue_start, u32 num_queues);
+void vgpu_ivc_deinit(u32 queue_start, u32 num_queues);
+void vgpu_ivc_release(void *handle);
+u32 vgpu_ivc_get_server_vmid(void);
+int vgpu_ivc_recv(u32 index, void **handle, void **data,
+				size_t *size, u32 *sender);
+int vgpu_ivc_send(u32 peer, u32 index, void *data, size_t size);
+int vgpu_ivc_sendrecv(u32 peer, u32 index, void **handle,
+				void **data, size_t *size);
+u32 vgpu_ivc_get_peer_self(void);
+void *vgpu_ivc_oob_get_ptr(u32 peer, u32 index, void **ptr,
+					size_t *size);
+void vgpu_ivc_oob_put_ptr(void *handle);
+
+#endif