gpu: nvgpu: ctx: fix misra rule 16.1 error

Fix misra errors from nvgpu_gr_ctx_prepare_hwpm_mode()

Error: MISRA C-2012 Rule 16.1:
nvgpu/drivers/gpu/nvgpu/common/gr/ctx.c:815:
missing_break: This switch clause does not end with
 an unconditional break statement.
nvgpu/drivers/gpu/nvgpu/common/gr/ctx.c:785:
misra_violation: The switch statement is not well formed.

NVGPU-3224

Change-Id: Ica7029fd84f443b8ce3d51a5c5f32bb6a6172040
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2112703
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Nitin Kumbhar
2019-05-06 13:22:43 +05:30
committed by mobile promotions
parent d19be32f91
commit 53873f5daf

View File

@@ -767,6 +767,7 @@ int nvgpu_gr_ctx_prepare_hwpm_mode(struct gk20a *g, struct nvgpu_gr_ctx *gr_ctx,
u32 mode, bool *skip_update)
{
struct pm_ctx_desc *pm_ctx = &gr_ctx->pm_ctx;
int ret = 0;
*skip_update = false;
@@ -814,10 +815,11 @@ int nvgpu_gr_ctx_prepare_hwpm_mode(struct gk20a *g, struct nvgpu_gr_ctx *gr_ctx,
break;
default:
nvgpu_err(g, "invalid hwpm context switch mode");
return -EINVAL;
ret = -EINVAL;
break;
}
return 0;
return ret;
}
int nvgpu_gr_ctx_set_hwpm_mode(struct gk20a *g, struct nvgpu_gr_ctx *gr_ctx,