gpu: nvgpu: Reorg debug HAL initialization

Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch covers the debug
and dbg_session_ops sub-modules of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: Id51feeccbea91f884a6057efc680566a7d5d0b6d
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514822
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

drivers/gpu/nvgpu/common/linux/debug.c

@@ -173,11 +173,6 @@ void gk20a_debug_show_dump(struct gk20a *g, struct gk20a_debug_output *o)
 	gk20a_debug_dump_all_channel_status_ramfc(g, o);
 }
 
-void gk20a_init_debug_ops(struct gpu_ops *gops)
-{
-	gops->debug.show_dump = gk20a_debug_show_dump;
-}
-
 static int railgate_residency_show(struct seq_file *s, void *data)
 {
 	struct gk20a *g = s->private;

drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.c

@@ -1277,7 +1277,7 @@ static int nvgpu_ioctl_channel_reg_ops(struct dbg_session_gk20a *dbg_s,
 	return err;
 }
 
-static int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, u32  powermode)
+int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, u32  powermode)
 {
 	int err = 0;
 	struct gk20a *g = dbg_s->g;
@@ -1646,7 +1646,7 @@ static struct dbg_profiler_object_data *find_matching_prof_obj(
 	return NULL;
 }
 
-static bool nvgpu_check_and_set_global_reservation(
+bool nvgpu_check_and_set_global_reservation(
 				struct dbg_session_gk20a *dbg_s,
 				struct dbg_profiler_object_data *prof_obj)
 {
@@ -1662,7 +1662,7 @@ static bool nvgpu_check_and_set_global_reservation(
 	return false;
 }
 
-static bool nvgpu_check_and_set_context_reservation(
+bool nvgpu_check_and_set_context_reservation(
 				struct dbg_session_gk20a *dbg_s,
 				struct dbg_profiler_object_data *prof_obj)
 {
@@ -1677,7 +1677,7 @@ static bool nvgpu_check_and_set_context_reservation(
 	return true;
 }
 
-static void nvgpu_release_profiler_reservation(struct dbg_session_gk20a *dbg_s,
+void nvgpu_release_profiler_reservation(struct dbg_session_gk20a *dbg_s,
 				struct dbg_profiler_object_data *prof_obj)
 {
 	struct gk20a *g = dbg_s->g;
@@ -1834,7 +1834,7 @@ static int nvgpu_ioctl_profiler_reserve(struct dbg_session_gk20a *dbg_s,
 	return nvgpu_profiler_reserve_release(dbg_s, args->profiler_handle);
 }
 
-static int gk20a_perfbuf_enable_locked(struct gk20a *g, u64 offset, u32 size)
+int gk20a_perfbuf_enable_locked(struct gk20a *g, u64 offset, u32 size)
 {
 	struct mm_gk20a *mm = &g->mm;
 	u32 virt_addr_lo;
@@ -1943,7 +1943,7 @@ err_remove_vm:
 }
 
 /* must be called with dbg_sessions_lock held */
-static int gk20a_perfbuf_disable_locked(struct gk20a *g)
+int gk20a_perfbuf_disable_locked(struct gk20a *g)
 {
 	int err = gk20a_busy(g);
 	if (err) {
@@ -2002,17 +2002,3 @@ static int gk20a_perfbuf_unmap(struct dbg_session_gk20a *dbg_s,
 
 	return err;
 }
-
-void gk20a_init_dbg_session_ops(struct gpu_ops *gops)
-{
-	gops->dbg_session_ops.exec_reg_ops = exec_regops_gk20a;
-	gops->dbg_session_ops.dbg_set_powergate = dbg_set_powergate;
-	gops->dbg_session_ops.check_and_set_global_reservation =
-					nvgpu_check_and_set_global_reservation;
-	gops->dbg_session_ops.check_and_set_context_reservation =
-					nvgpu_check_and_set_context_reservation;
-	gops->dbg_session_ops.release_profiler_reservation =
-					nvgpu_release_profiler_reservation;
-	gops->dbg_session_ops.perfbuffer_enable = gk20a_perfbuf_enable_locked;
-	gops->dbg_session_ops.perfbuffer_disable = gk20a_perfbuf_disable_locked;
-};

drivers/gpu/nvgpu/gk20a/dbg_gpu_gk20a.h

@@ -127,6 +127,17 @@ int dbg_unbind_single_channel_gk20a(struct dbg_session_gk20a *dbg_s,
 
 bool gk20a_dbg_gpu_broadcast_stop_trigger(struct channel_gk20a *ch);
 int gk20a_dbg_gpu_clear_broadcast_stop_trigger(struct channel_gk20a *ch);
-void gk20a_init_dbg_session_ops(struct gpu_ops *gops);
+
+int dbg_set_powergate(struct dbg_session_gk20a *dbg_s, u32  powermode);
+bool nvgpu_check_and_set_global_reservation(
+				struct dbg_session_gk20a *dbg_s,
+				struct dbg_profiler_object_data *prof_obj);
+bool nvgpu_check_and_set_context_reservation(
+				struct dbg_session_gk20a *dbg_s,
+				struct dbg_profiler_object_data *prof_obj);
+void nvgpu_release_profiler_reservation(struct dbg_session_gk20a *dbg_s,
+				struct dbg_profiler_object_data *prof_obj);
+int gk20a_perfbuf_enable_locked(struct gk20a *g, u64 offset, u32 size);
+int gk20a_perfbuf_disable_locked(struct gk20a *g);
 
 #endif /* DBG_GPU_GK20A_H */

drivers/gpu/nvgpu/gm20b/hal_gm20b.c

@@ -20,6 +20,7 @@
 #include "gk20a/bus_gk20a.h"
 #include "gk20a/flcn_gk20a.h"
 #include "gk20a/priv_ring_gk20a.h"
+#include "gk20a/regops_gk20a.h"
 
 #include "ltc_gm20b.h"
 #include "ce2_gm20b.h"
@@ -215,6 +216,21 @@ static const struct gpu_ops gm20b_ops = {
 		.boot_0 = gk20a_mc_boot_0,
 		.is_intr1_pending = mc_gk20a_is_intr1_pending,
 	},
+	.debug = {
+		.show_dump = gk20a_debug_show_dump,
+	},
+	.dbg_session_ops = {
+		.exec_reg_ops = exec_regops_gk20a,
+		.dbg_set_powergate = dbg_set_powergate,
+		.check_and_set_global_reservation =
+			nvgpu_check_and_set_global_reservation,
+		.check_and_set_context_reservation =
+			nvgpu_check_and_set_context_reservation,
+		.release_profiler_reservation =
+			nvgpu_release_profiler_reservation,
+		.perfbuffer_enable = gk20a_perfbuf_enable_locked,
+		.perfbuffer_disable = gk20a_perfbuf_disable_locked,
+	},
 	.cde = {
 		.get_program_numbers = gm20b_cde_get_program_numbers,
 	},
@@ -234,6 +250,8 @@ int gm20b_init_hal(struct gk20a *g)
 	gops->ltc = gm20b_ops.ltc;
 	gops->clock_gating = gm20b_ops.clock_gating;
 	gops->mc = gm20b_ops.mc;
+	gops->dbg_session_ops = gm20b_ops.dbg_session_ops;
+	gops->debug = gm20b_ops.debug;
 	gops->cde = gm20b_ops.cde;
 	gops->falcon = gm20b_ops.falcon;
 
@@ -282,8 +300,6 @@ int gm20b_init_hal(struct gk20a *g)
 	gm20b_init_pmu_ops(gops);
 	gm20b_init_clk_ops(gops);
 	gm20b_init_regops(gops);
-	gk20a_init_debug_ops(gops);
-	gk20a_init_dbg_session_ops(gops);
 	gm20b_init_therm_ops(gops);
 	gk20a_init_tsg_ops(gops);
 #if defined(CONFIG_GK20A_CYCLE_STATS)

drivers/gpu/nvgpu/gp106/hal_gp106.c

@@ -19,6 +19,7 @@
 #include "gk20a/bus_gk20a.h"
 #include "gk20a/pramin_gk20a.h"
 #include "gk20a/flcn_gk20a.h"
+#include "gk20a/regops_gk20a.h"
 #include "gk20a/mc_gk20a.h"
 
 #include "gp10b/ltc_gp10b.h"
@@ -257,6 +258,21 @@ static const struct gpu_ops gp106_ops = {
 		.boot_0 = gk20a_mc_boot_0,
 		.is_intr1_pending = mc_gp10b_is_intr1_pending,
 	},
+	.debug = {
+		.show_dump = gk20a_debug_show_dump,
+	},
+	.dbg_session_ops = {
+		.exec_reg_ops = exec_regops_gk20a,
+		.dbg_set_powergate = dbg_set_powergate,
+		.check_and_set_global_reservation =
+			nvgpu_check_and_set_global_reservation,
+		.check_and_set_context_reservation =
+			nvgpu_check_and_set_context_reservation,
+		.release_profiler_reservation =
+			nvgpu_release_profiler_reservation,
+		.perfbuffer_enable = gk20a_perfbuf_enable_locked,
+		.perfbuffer_disable = gk20a_perfbuf_disable_locked,
+	},
 	.cde = {
 		.get_program_numbers = gp10b_cde_get_program_numbers,
 		.need_scatter_buffer = gp10b_need_scatter_buffer,
@@ -295,6 +311,8 @@ int gp106_init_hal(struct gk20a *g)
 	gops->ltc = gp106_ops.ltc;
 	gops->clock_gating = gp106_ops.clock_gating;
 	gops->mc = gp106_ops.mc;
+	gops->debug = gp106_ops.debug;
+	gops->dbg_session_ops = gp106_ops.dbg_session_ops;
 	gops->cde = gp106_ops.cde;
 	gops->xve = gp106_ops.xve;
 	gops->falcon = gp106_ops.falcon;
@@ -318,8 +336,6 @@ int gp106_init_hal(struct gk20a *g)
 	gp106_init_gr_ctx(gops);
 	gp106_init_mm(gops);
 	gp106_init_pmu_ops(gops);
-	gk20a_init_debug_ops(gops);
-	gk20a_init_dbg_session_ops(gops);
 	gp106_init_clk_ops(gops);
 	gp106_init_clk_arb_ops(gops);
 	gp106_init_regops(gops);

drivers/gpu/nvgpu/gp10b/hal_gp10b.c

@@ -19,6 +19,7 @@
 #include "gk20a/bus_gk20a.h"
 #include "gk20a/pramin_gk20a.h"
 #include "gk20a/flcn_gk20a.h"
+#include "gk20a/regops_gk20a.h"
 #include "gk20a/mc_gk20a.h"
 
 #include "gp10b/gr_gp10b.h"
@@ -224,6 +225,21 @@ static const struct gpu_ops gp10b_ops = {
 		.boot_0 = gk20a_mc_boot_0,
 		.is_intr1_pending = mc_gp10b_is_intr1_pending,
 	},
+	.debug = {
+		.show_dump = gk20a_debug_show_dump,
+	},
+	.dbg_session_ops = {
+		.exec_reg_ops = exec_regops_gk20a,
+		.dbg_set_powergate = dbg_set_powergate,
+		.check_and_set_global_reservation =
+			nvgpu_check_and_set_global_reservation,
+		.check_and_set_context_reservation =
+			nvgpu_check_and_set_context_reservation,
+		.release_profiler_reservation =
+			nvgpu_release_profiler_reservation,
+		.perfbuffer_enable = gk20a_perfbuf_enable_locked,
+		.perfbuffer_disable = gk20a_perfbuf_disable_locked,
+	},
 	.cde = {
 		.get_program_numbers = gp10b_cde_get_program_numbers,
 		.need_scatter_buffer = gp10b_need_scatter_buffer,
@@ -245,6 +261,8 @@ int gp10b_init_hal(struct gk20a *g)
 	gops->ltc = gp10b_ops.ltc;
 	gops->clock_gating = gp10b_ops.clock_gating;
 	gops->mc = gp10b_ops.mc;
+	gops->debug = gp10b_ops.debug;
+	gops->dbg_session_ops = gp10b_ops.dbg_session_ops;
 	gops->cde = gp10b_ops.cde;
 	gops->falcon = gp10b_ops.falcon;
 
@@ -301,8 +319,6 @@ int gp10b_init_hal(struct gk20a *g)
 	gp10b_init_gr_ctx(gops);
 	gp10b_init_mm(gops);
 	gp10b_init_pmu_ops(gops);
-	gk20a_init_debug_ops(gops);
-	gk20a_init_dbg_session_ops(gops);
 	gp10b_init_regops(gops);
 	gp10b_init_therm_ops(gops);
 	gk20a_init_tsg_ops(gops);

drivers/gpu/nvgpu/include/nvgpu/debug.h

@@ -46,8 +46,6 @@ static inline void gk20a_debug_output(struct gk20a_debug_output *o,
 static inline void gk20a_debug_dump(struct gk20a *g) {}
 static inline void gk20a_debug_show_dump(struct gk20a *g, struct gk20a_debug_output *o) {}
 static inline int gk20a_gr_debug_dump(struct gk20a *g) { return 0;}
-static inline void gk20a_init_debug_ops(struct gpu_ops *gops) {}
-
 static inline void gk20a_debug_init(struct gk20a *g, const char *debugfs_symlink) {}
 static inline void gk20a_debug_deinit(struct gk20a *g) {}
 #endif