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nvgpu: gpu: Remove usage of VOLT_RAIL_GET_VOLTAGE RPC

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VOLT_RAIL_GET_VOLTAGE RPC is no longer available for
turing auto profile. Instead volt_rail_get_status cmd
will fetch the required voltage values.

NVGPU-4326

Change-Id: I3270c259b92effd13b3183e52af689ea2dc35c37
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2233106
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
rmylavarapu
2019-11-06 14:50:40 +05:30
committed by Alex Waterman
parent 692a442e9d
commit 54d2132b69
3 changed files with 4 additions and 99 deletions
Download Patch File Download Diff File Expand all files Collapse all files

84
drivers/gpu/nvgpu/common/pmu/volt/volt_pmu.c
View File

@@ -39,78 +39,6 @@ struct volt_rpc_pmucmdhandler_params {
u32 success; u32 success;
}; };
static int volt_set_voltage_rpc(struct gk20a *g, u8 client_id,
struct ctrl_volt_volt_rail_list_v1 *prail_list)
{
struct nvgpu_pmu *pmu = g->pmu;
struct nv_pmu_rpc_struct_volt_volt_set_voltage rpc;
int status = 0;
(void) memset(&rpc, 0,
sizeof(struct nv_pmu_rpc_struct_volt_volt_set_voltage));
rpc.client_id = 0x1;
rpc.rail_list = *prail_list;
PMU_RPC_EXECUTE_CPB(status, pmu, VOLT, VOLT_SET_VOLTAGE, &rpc, 0);
if (status != 0) {
nvgpu_err(g, "Failed to execute RPC status=0x%x",
status);
}
return status;
}
static int volt_rail_get_voltage(struct gk20a *g,
u8 volt_domain, u32 *pvoltage_uv)
{
struct nvgpu_pmu *pmu = g->pmu;
struct nv_pmu_rpc_struct_volt_volt_rail_get_voltage rpc;
int status = 0;
u8 rail_idx;
rail_idx = nvgpu_volt_rail_volt_domain_convert_to_idx(g, volt_domain);
if ((rail_idx == CTRL_VOLT_RAIL_INDEX_INVALID) ||
(!VOLT_RAIL_INDEX_IS_VALID(&g->perf_pmu->volt, rail_idx))) {
nvgpu_err(g,
"failed: volt_domain = %d, voltage rail table = %d.",
volt_domain, rail_idx);
return -EINVAL;
}
(void) memset(&rpc, 0,
sizeof(struct nv_pmu_rpc_struct_volt_volt_rail_get_voltage));
rpc.rail_idx = rail_idx;
PMU_RPC_EXECUTE_CPB(status, pmu, VOLT, VOLT_RAIL_GET_VOLTAGE, &rpc, 0);
if (status != 0) {
nvgpu_err(g, "Failed to execute RPC status=0x%x",
status);
}
*pvoltage_uv = rpc.voltage_uv;
return status;
}
static int volt_set_voltage(struct gk20a *g, u32 logic_voltage_uv,
u32 sram_voltage_uv)
{
int status = 0;
struct ctrl_volt_volt_rail_list_v1 rail_list = { 0 };
rail_list.num_rails = RAIL_COUNT_GV;
rail_list.rails[0].rail_idx =
nvgpu_volt_rail_volt_domain_convert_to_idx(g,
CTRL_VOLT_DOMAIN_LOGIC);
rail_list.rails[0].voltage_uv = logic_voltage_uv;
rail_list.rails[0].voltage_min_noise_unaware_uv = logic_voltage_uv;
status = volt_set_voltage_rpc(g,
CTRL_VOLT_POLICY_CLIENT_PERF_CORE_VF_SEQ, &rail_list);
return status;
}
int nvgpu_volt_send_load_cmd_to_pmu(struct gk20a *g) int nvgpu_volt_send_load_cmd_to_pmu(struct gk20a *g)
{ {
struct nvgpu_pmu *pmu = g->pmu; struct nvgpu_pmu *pmu = g->pmu;
@@ -127,18 +55,6 @@ int nvgpu_volt_send_load_cmd_to_pmu(struct gk20a *g)
return status; return status;
} }
int nvgpu_volt_set_voltage(struct gk20a *g, u32 logic_voltage_uv, u32 sram_voltage_uv)
{
return volt_set_voltage(g,
logic_voltage_uv, sram_voltage_uv);
}
int nvgpu_volt_get_voltage(struct gk20a *g, u32 volt_domain, u32 *voltage_uv)
{
return volt_rail_get_voltage(g,
(u8)volt_domain, voltage_uv);
}
void nvgpu_pmu_volt_rpc_handler(struct gk20a *g, struct nv_pmu_rpc_header *rpc) void nvgpu_pmu_volt_rpc_handler(struct gk20a *g, struct nv_pmu_rpc_header *rpc)
{ {
switch (rpc->function) { switch (rpc->function) {

3
drivers/gpu/nvgpu/include/nvgpu/pmu/volt.h
View File

@@ -90,9 +90,6 @@ struct voltage_rail {
u32 current_volt_uv; u32 current_volt_uv;
}; };
int nvgpu_volt_set_voltage(struct gk20a *g, u32 logic_voltage_uv,
u32 sram_voltage_uv);
int nvgpu_volt_get_voltage(struct gk20a *g, u32 volt_domain, u32 *voltage_uv);
int nvgpu_volt_send_load_cmd_to_pmu(struct gk20a *g); int nvgpu_volt_send_load_cmd_to_pmu(struct gk20a *g);
int nvgpu_volt_dev_sw_setup(struct gk20a *g); int nvgpu_volt_dev_sw_setup(struct gk20a *g);

16
drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c
View File

@@ -1441,18 +1441,10 @@ static int nvgpu_gpu_get_voltage(struct gk20a *g,
return err; return err;
nvgpu_speculation_barrier(); nvgpu_speculation_barrier();
switch (args->which) {
case NVGPU_GPU_VOLTAGE_CORE: err = nvgpu_volt_get_curr_volt_ps35(g, &args->voltage);
err = nvgpu_volt_get_voltage(g, CTRL_VOLT_DOMAIN_LOGIC, &args->voltage); if (err) {
break; return err;
case NVGPU_GPU_VOLTAGE_SRAM:
err = nvgpu_volt_get_voltage(g, CTRL_VOLT_DOMAIN_SRAM, &args->voltage);
break;
case NVGPU_GPU_VOLTAGE_BUS:
err = pmgr_pwr_devices_get_voltage(g, &args->voltage);
break;
default:
err = -EINVAL;
} }
gk20a_idle(g); gk20a_idle(g);