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gpu: nvgpu: create new gr/fecs_trace unit
Create new gr/fecs_trace unit with common/gr/fecs_trace/fecs_trace.c as common source file and include/nvgpu/gr/fecs_trace.h as common header file This unit will be common between Linux and QNX Corresponding HAL files will be added under common/gr/fecs_trace/ as more functionality is moved to new unit For now move struct gk20a_fecs_trace_hash_ent to new unit and rename it as struct nvgpu_fecs_trace_context_entry Add vmid field to this struct since it is required for QNX Remove use of hashtables and simply use linked list to simplify the code. FECS tracing is not a performance sensitive use case so perf hit could be ignored Rename hash_lock mutex to list_lock struct gk20a_fecs_trace and mutex list_lock are still declared in gk20a/fecs_trace_gk20a.c, hence they cannot be used in new unit yet Rename and update all gk20a_fecs_trace_hash_*() APIs to appropriate nvgpu_gr_fecs_trace_*() APIs Remove gk20a_fecs_trace_hash_dump() since it is not being used Jira NVGPU-1880 Change-Id: I89c2715baa770dbbd864ea70ab43d83d98ba693c Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2022903 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
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mobile promotions
parent
decbbf3504
commit
556041f425
@@ -90,6 +90,7 @@ nvgpu-y += common/bus/bus_gk20a.o \
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common/gr/subctx.o \
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common/gr/config/gr_config.o \
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common/gr/config/gr_config_gm20b.o \
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common/gr/fecs_trace/fecs_trace.o \
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common/netlist/netlist.o \
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common/netlist/netlist_sim.o \
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common/netlist/netlist_gm20b.o \
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@@ -135,6 +135,7 @@ srcs += common/sim.c \
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common/gr/ctx.c \
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common/gr/config/gr_config.c \
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common/gr/config/gr_config_gm20b.c \
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common/gr/fecs_trace/fecs_trace.c \
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common/netlist/netlist.c \
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common/netlist/netlist_sim.c \
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common/netlist/netlist_gm20b.c \
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107
drivers/gpu/nvgpu/common/gr/fecs_trace/fecs_trace.c
Normal file
107
drivers/gpu/nvgpu/common/gr/fecs_trace/fecs_trace.c
Normal file
@@ -0,0 +1,107 @@
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/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/gk20a.h>
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#include <nvgpu/list.h>
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#include <nvgpu/log.h>
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#include <nvgpu/gr/fecs_trace.h>
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int nvgpu_gr_fecs_trace_add_context(struct gk20a *g, u32 context_ptr,
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pid_t pid, u32 vmid, struct nvgpu_list_node *list)
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{
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struct nvgpu_fecs_trace_context_entry *entry;
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nvgpu_log(g, gpu_dbg_fn | gpu_dbg_ctxsw,
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"adding hash entry context_ptr=%x -> pid=%d, vmid=%d",
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context_ptr, pid, vmid);
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entry = nvgpu_kzalloc(g, sizeof(*entry));
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if (unlikely(!entry)) {
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nvgpu_err(g,
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"can't alloc new entry for context_ptr=%x pid=%d vmid=%d",
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context_ptr, pid, vmid);
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return -ENOMEM;
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}
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nvgpu_init_list_node(&entry->entry);
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entry->context_ptr = context_ptr;
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entry->pid = pid;
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entry->vmid = vmid;
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nvgpu_list_add_tail(&entry->entry, list);
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return 0;
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}
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void nvgpu_gr_fecs_trace_remove_context(struct gk20a *g, u32 context_ptr,
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struct nvgpu_list_node *list)
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{
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struct nvgpu_fecs_trace_context_entry *entry, *tmp;
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nvgpu_log(g, gpu_dbg_fn | gpu_dbg_ctxsw,
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"freeing entry context_ptr=%x", context_ptr);
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nvgpu_list_for_each_entry_safe(entry, tmp, list,
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nvgpu_fecs_trace_context_entry, entry) {
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if (entry->context_ptr == context_ptr) {
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nvgpu_list_del(&entry->entry);
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nvgpu_log(g, gpu_dbg_ctxsw,
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"freed entry=%p context_ptr=%x", entry,
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entry->context_ptr);
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nvgpu_kfree(g, entry);
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break;
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}
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}
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}
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void nvgpu_gr_fecs_trace_remove_contexts(struct gk20a *g,
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struct nvgpu_list_node *list)
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{
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struct nvgpu_fecs_trace_context_entry *entry, *tmp;
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nvgpu_list_for_each_entry_safe(entry, tmp, list,
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nvgpu_fecs_trace_context_entry, entry) {
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nvgpu_list_del(&entry->entry);
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nvgpu_kfree(g, entry);
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}
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}
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void nvgpu_gr_fecs_trace_find_pid(struct gk20a *g, u32 context_ptr,
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struct nvgpu_list_node *list, pid_t *pid, u32 *vmid)
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{
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struct nvgpu_fecs_trace_context_entry *entry;
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nvgpu_list_for_each_entry(entry, list, nvgpu_fecs_trace_context_entry,
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entry) {
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if (entry->context_ptr == context_ptr) {
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nvgpu_log(g, gpu_dbg_ctxsw,
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"found context_ptr=%x -> pid=%d, vmid=%d",
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entry->context_ptr, entry->pid, entry->vmid);
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*pid = entry->pid;
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*vmid = entry->vmid;
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return;
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}
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}
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*pid = 0;
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*vmid = 0xffffffffU;
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}
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@@ -24,7 +24,6 @@
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#include <nvgpu/dma.h>
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#include <nvgpu/enabled.h>
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#include <nvgpu/bug.h>
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#include <nvgpu/hashtable.h>
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#include <nvgpu/circ_buf.h>
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#include <nvgpu/thread.h>
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#include <nvgpu/barrier.h>
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@@ -39,6 +38,7 @@
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#include <nvgpu/gr/global_ctx.h>
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#include <nvgpu/gr/subctx.h>
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#include <nvgpu/gr/ctx.h>
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#include <nvgpu/gr/fecs_trace.h>
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#include "fecs_trace_gk20a.h"
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#include "gr_gk20a.h"
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@@ -48,16 +48,9 @@
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#include <nvgpu/hw/gk20a/hw_gr_gk20a.h>
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struct gk20a_fecs_trace_hash_ent {
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u32 context_ptr;
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pid_t pid;
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struct hlist_node node;
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};
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struct gk20a_fecs_trace {
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DECLARE_HASHTABLE(pid_hash_table, GK20A_FECS_TRACE_HASH_BITS);
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struct nvgpu_mutex hash_lock;
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struct nvgpu_list_node context_list;
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struct nvgpu_mutex list_lock;
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struct nvgpu_mutex poll_lock;
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struct nvgpu_thread poll_task;
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bool init;
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@@ -119,111 +112,6 @@ static int gk20a_fecs_trace_set_read_index(struct gk20a *g, int index)
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(gk20a_writel(g, gr_fecs_mailbox1_r(), index), 0));
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}
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void gk20a_fecs_trace_hash_dump(struct gk20a *g)
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{
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u32 bkt;
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struct gk20a_fecs_trace_hash_ent *ent;
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struct gk20a_fecs_trace *trace = g->fecs_trace;
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nvgpu_log(g, gpu_dbg_ctxsw, "dumping hash table");
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nvgpu_mutex_acquire(&trace->hash_lock);
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hash_for_each(trace->pid_hash_table, bkt, ent, node)
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{
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nvgpu_log(g, gpu_dbg_ctxsw, " ent=%p bkt=%x context_ptr=%x pid=%d",
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ent, bkt, ent->context_ptr, ent->pid);
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}
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nvgpu_mutex_release(&trace->hash_lock);
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}
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static int gk20a_fecs_trace_hash_add(struct gk20a *g, u32 context_ptr, pid_t pid)
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{
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struct gk20a_fecs_trace_hash_ent *he;
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struct gk20a_fecs_trace *trace = g->fecs_trace;
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nvgpu_log(g, gpu_dbg_fn | gpu_dbg_ctxsw,
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"adding hash entry context_ptr=%x -> pid=%d", context_ptr, pid);
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he = nvgpu_kzalloc(g, sizeof(*he));
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if (unlikely(!he)) {
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nvgpu_warn(g,
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"can't alloc new hash entry for context_ptr=%x pid=%d",
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context_ptr, pid);
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return -ENOMEM;
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}
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he->context_ptr = context_ptr;
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he->pid = pid;
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nvgpu_mutex_acquire(&trace->hash_lock);
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hash_add(trace->pid_hash_table, &he->node, context_ptr);
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nvgpu_mutex_release(&trace->hash_lock);
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return 0;
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}
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static void gk20a_fecs_trace_hash_del(struct gk20a *g, u32 context_ptr)
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{
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struct hlist_node *tmp;
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struct gk20a_fecs_trace_hash_ent *ent;
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struct gk20a_fecs_trace *trace = g->fecs_trace;
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nvgpu_log(g, gpu_dbg_fn | gpu_dbg_ctxsw,
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"freeing hash entry context_ptr=%x", context_ptr);
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nvgpu_mutex_acquire(&trace->hash_lock);
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hash_for_each_possible_safe(trace->pid_hash_table, ent, tmp, node,
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context_ptr) {
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if (ent->context_ptr == context_ptr) {
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hash_del(&ent->node);
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nvgpu_log(g, gpu_dbg_ctxsw,
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"freed hash entry=%p context_ptr=%x", ent,
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ent->context_ptr);
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nvgpu_kfree(g, ent);
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break;
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}
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}
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nvgpu_mutex_release(&trace->hash_lock);
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}
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static void gk20a_fecs_trace_free_hash_table(struct gk20a *g)
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{
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u32 bkt;
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struct hlist_node *tmp;
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struct gk20a_fecs_trace_hash_ent *ent;
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struct gk20a_fecs_trace *trace = g->fecs_trace;
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nvgpu_log(g, gpu_dbg_fn | gpu_dbg_ctxsw, "trace=%p", trace);
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nvgpu_mutex_acquire(&trace->hash_lock);
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hash_for_each_safe(trace->pid_hash_table, bkt, tmp, ent, node) {
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hash_del(&ent->node);
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nvgpu_kfree(g, ent);
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}
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nvgpu_mutex_release(&trace->hash_lock);
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}
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static pid_t gk20a_fecs_trace_find_pid(struct gk20a *g, u32 context_ptr)
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{
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struct gk20a_fecs_trace_hash_ent *ent;
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struct gk20a_fecs_trace *trace = g->fecs_trace;
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pid_t pid = 0;
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nvgpu_mutex_acquire(&trace->hash_lock);
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hash_for_each_possible(trace->pid_hash_table, ent, node, context_ptr) {
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if (ent->context_ptr == context_ptr) {
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nvgpu_log(g, gpu_dbg_ctxsw,
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"found context_ptr=%x -> pid=%d",
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ent->context_ptr, ent->pid);
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pid = ent->pid;
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break;
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}
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}
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nvgpu_mutex_release(&trace->hash_lock);
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return pid;
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}
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/*
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* Converts HW entry format to userspace-facing format and pushes it to the
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* queue.
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@@ -235,6 +123,7 @@ static int gk20a_fecs_trace_ring_read(struct gk20a *g, int index)
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struct gk20a_fecs_trace *trace = g->fecs_trace;
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pid_t cur_pid;
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pid_t new_pid;
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u32 cur_vmid, new_vmid;
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int count = 0;
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/* for now, only one VM */
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@@ -262,8 +151,12 @@ static int gk20a_fecs_trace_ring_read(struct gk20a *g, int index)
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*/
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r->magic_hi = 0;
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cur_pid = gk20a_fecs_trace_find_pid(g, r->context_ptr);
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new_pid = gk20a_fecs_trace_find_pid(g, r->new_context_ptr);
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nvgpu_mutex_acquire(&trace->list_lock);
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nvgpu_gr_fecs_trace_find_pid(g, r->context_ptr, &trace->context_list,
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&cur_pid, &cur_vmid);
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nvgpu_gr_fecs_trace_find_pid(g, r->new_context_ptr, &trace->context_list,
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&new_pid, &new_vmid);
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nvgpu_mutex_release(&trace->list_lock);
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nvgpu_log(g, gpu_dbg_fn | gpu_dbg_ctxsw,
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"context_ptr=%x (pid=%d) new_context_ptr=%x (pid=%d)",
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@@ -418,12 +311,12 @@ int gk20a_fecs_trace_init(struct gk20a *g)
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err = nvgpu_mutex_init(&trace->poll_lock);
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if (err != 0)
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goto clean;
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err = nvgpu_mutex_init(&trace->hash_lock);
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err = nvgpu_mutex_init(&trace->list_lock);
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if (err != 0)
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goto clean_poll_lock;
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BUG_ON(!is_power_of_2(GK20A_FECS_TRACE_NUM_RECORDS));
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hash_init(trace->pid_hash_table);
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nvgpu_init_list_node(&trace->context_list);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_FECS_CTXSW_TRACE, true);
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@@ -453,6 +346,7 @@ int gk20a_fecs_trace_bind_channel(struct gk20a *g,
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u32 context_ptr = gk20a_fecs_trace_fecs_context_ptr(g, ch);
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u32 aperture_mask;
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struct tsg_gk20a *tsg;
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int ret;
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tsg = tsg_gk20a_from_ch(ch);
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if (tsg == NULL) {
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@@ -504,16 +398,20 @@ int gk20a_fecs_trace_bind_channel(struct gk20a *g,
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/* pid (process identifier) in user space, corresponds to tgid (thread
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* group id) in kernel space.
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*/
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gk20a_fecs_trace_hash_add(g, context_ptr, tsg->tgid);
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nvgpu_mutex_acquire(&trace->list_lock);
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ret = nvgpu_gr_fecs_trace_add_context(g, context_ptr, tsg->tgid, 0,
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&trace->context_list);
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nvgpu_mutex_release(&trace->list_lock);
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return 0;
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return ret;
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}
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int gk20a_fecs_trace_unbind_channel(struct gk20a *g, struct channel_gk20a *ch)
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{
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u32 context_ptr = gk20a_fecs_trace_fecs_context_ptr(g, ch);
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struct gk20a_fecs_trace *trace = g->fecs_trace;
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if (g->fecs_trace) {
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if (trace) {
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nvgpu_log(g, gpu_dbg_fn|gpu_dbg_ctxsw,
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"ch=%p context_ptr=%x", ch, context_ptr);
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@@ -522,7 +420,11 @@ int gk20a_fecs_trace_unbind_channel(struct gk20a *g, struct channel_gk20a *ch)
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g->ops.fecs_trace.flush(g);
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gk20a_fecs_trace_poll(g);
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}
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gk20a_fecs_trace_hash_del(g, context_ptr);
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nvgpu_mutex_acquire(&trace->list_lock);
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nvgpu_gr_fecs_trace_remove_context(g, context_ptr,
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&trace->context_list);
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nvgpu_mutex_release(&trace->list_lock);
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}
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return 0;
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}
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@@ -546,9 +448,12 @@ int gk20a_fecs_trace_deinit(struct gk20a *g)
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return 0;
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nvgpu_thread_stop(&trace->poll_task);
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gk20a_fecs_trace_free_hash_table(g);
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nvgpu_mutex_destroy(&g->fecs_trace->hash_lock);
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nvgpu_mutex_acquire(&trace->list_lock);
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nvgpu_gr_fecs_trace_remove_contexts(g, &trace->context_list);
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nvgpu_mutex_release(&trace->list_lock);
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nvgpu_mutex_destroy(&g->fecs_trace->list_lock);
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nvgpu_mutex_destroy(&g->fecs_trace->poll_lock);
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nvgpu_kfree(g, g->fecs_trace);
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
|
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*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
@@ -30,7 +30,6 @@ struct gk20a;
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* increasing this constant should help (it drives Linux' internal buffer size).
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*/
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#define GK20A_FECS_TRACE_NUM_RECORDS (1 << 10)
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#define GK20A_FECS_TRACE_HASH_BITS 8 /* 2^8 */
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#define GK20A_FECS_TRACE_FRAME_PERIOD_US (1000000ULL/60ULL)
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#define GK20A_FECS_TRACE_PTIMER_SHIFT 5
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57
drivers/gpu/nvgpu/include/nvgpu/gr/fecs_trace.h
Normal file
57
drivers/gpu/nvgpu/include/nvgpu/gr/fecs_trace.h
Normal file
@@ -0,0 +1,57 @@
|
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/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
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*/
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#ifndef NVGPU_GR_FECS_TRACE_H
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#define NVGPU_GR_FECS_TRACE_H
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#include <nvgpu/types.h>
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#include <nvgpu/list.h>
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struct gk20a;
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struct nvgpu_fecs_trace_context_entry {
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u32 context_ptr;
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pid_t pid;
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u32 vmid;
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struct nvgpu_list_node entry;
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};
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static inline struct nvgpu_fecs_trace_context_entry *
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nvgpu_fecs_trace_context_entry_from_entry(struct nvgpu_list_node *node)
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{
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return (struct nvgpu_fecs_trace_context_entry *)
|
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((uintptr_t)node -
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offsetof(struct nvgpu_fecs_trace_context_entry, entry));
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||||
};
|
||||
|
||||
int nvgpu_gr_fecs_trace_add_context(struct gk20a *g, u32 context_ptr,
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pid_t pid, u32 vmid, struct nvgpu_list_node *list);
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||||
void nvgpu_gr_fecs_trace_remove_context(struct gk20a *g, u32 context_ptr,
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||||
struct nvgpu_list_node *list);
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||||
void nvgpu_gr_fecs_trace_remove_contexts(struct gk20a *g,
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||||
struct nvgpu_list_node *list);
|
||||
void nvgpu_gr_fecs_trace_find_pid(struct gk20a *g, u32 context_ptr,
|
||||
struct nvgpu_list_node *list, pid_t *pid, u32 *vmid);
|
||||
|
||||
#endif /* NVGPU_GR_FECS_TRACE_H */
|
||||
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