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gpu: nvgpu: Cleanup GMMU debug printing

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Ensure that all debug prints are consistent from chip to chip
and function to function. The following maps letters in the
debug print to their meaning:

  C  Mapping is cachable
  v  Mapping is volatile
  S  Mapping is sparse
  P  Mapping is private (VPR/WPR)
  c  Mapping is coherent
  V  Mapping is valid

JIRA NVGPU-30

Change-Id: Ia890af88677c3e6d3fdd8c4fe266158c35b8afcd
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master/r/1514903
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Tested-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
This commit is contained in:
Alex Waterman
2017-07-06 17:22:03 -07:00
committed by mobile promotions
parent 6065b8c3ac
commit 57abaabb76
3 changed files with 13 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/gpu/nvgpu/common/mm/gmmu.c
View File

@@ -666,7 +666,7 @@ static int __nvgpu_gmmu_update_page_table(struct vm_gk20a *vm,
"vm=%s "
"%-5s GPU virt %#-12llx +%#-9llx phys %#-12llx "
"phys offset: %#-4llx; pgsz: %3dkb perm=%-2s | "
"kind=%#02x APT=%-6s %c%c%c",
"kind=%#02x APT=%-6s %c%c%c%c%c",
vm->name,
sgt ? "MAP" : "UNMAP",
virt_addr,
@@ -677,9 +677,11 @@ static int __nvgpu_gmmu_update_page_table(struct vm_gk20a *vm,
nvgpu_gmmu_perm_str(attrs->rw_flag),
attrs->kind_v,
nvgpu_aperture_str(attrs->aperture),
attrs->cacheable ? 'C' : 'V', /* C = cached, V = volatile. */
attrs->cacheable ? 'C' : 'c', /* C = cached, V = volatile. */
attrs->sparse ? 'S' : '-',
attrs->priv ? 'P' : '-');
attrs->priv ? 'P' : '-',
attrs->coherent ? 'c' : '-',
attrs->valid ? 'V' : '-');
/*
* Handle VIDMEM progamming. Currently uses a different scatter list

7
drivers/gpu/nvgpu/gk20a/mm_gk20a.c
View File

@@ -1700,7 +1700,7 @@ static void update_gmmu_pte_locked(struct vm_gk20a *vm,
pte_dbg(g, attrs,
"PTE: i=%-4u size=%-2u offs=%-4u | "
"GPU %#-12llx phys %#-12llx "
"pgsz: %3dkb perm=%-2s kind=%#02x APT=%-6s %c%c%c%c "
"pgsz: %3dkb perm=%-2s kind=%#02x APT=%-6s %c%c%c%c%c "
"ctag=0x%08x "
"[0x%08x, 0x%08x]",
pd_idx, l->entry_size, pd_offset,
@@ -1709,10 +1709,11 @@ static void update_gmmu_pte_locked(struct vm_gk20a *vm,
nvgpu_gmmu_perm_str(attrs->rw_flag),
attrs->kind_v,
nvgpu_aperture_str(attrs->aperture),
attrs->valid ? 'V' : '-',
attrs->cacheable ? 'C' : '-',
attrs->cacheable ? 'C' : 'v',
attrs->sparse ? 'S' : '-',
attrs->priv ? 'P' : '-',
attrs->coherent ? 'c' : '-',
attrs->valid ? 'V' : '-',
(u32)attrs->ctag >> ctag_shift,
pte_w[1], pte_w[0]);

7
drivers/gpu/nvgpu/gp10b/mm_gp10b.c
View File

@@ -288,7 +288,7 @@ static void update_gmmu_pte_locked(struct vm_gk20a *vm,
"vm=%s "
"PTE: i=%-4u size=%-2u offs=%-4u | "
"GPU %#-12llx phys %#-12llx "
"pgsz: %3dkb perm=%-2s kind=%#02x APT=%-6s %c%c%c%c "
"pgsz: %3dkb perm=%-2s kind=%#02x APT=%-6s %c%c%c%c%c "
"ctag=0x%08x "
"[0x%08x, 0x%08x]",
vm->name,
@@ -298,10 +298,11 @@ static void update_gmmu_pte_locked(struct vm_gk20a *vm,
nvgpu_gmmu_perm_str(attrs->rw_flag),
attrs->kind_v,
nvgpu_aperture_str(attrs->aperture),
attrs->valid ? 'V' : '-',
attrs->cacheable ? 'C' : '-',
attrs->cacheable ? 'C' : 'v',
attrs->sparse ? 'S' : '-',
attrs->priv ? 'P' : '-',
attrs->coherent ? 'c' : '-',
attrs->valid ? 'V' : '-',
(u32)attrs->ctag / g->ops.fb.compression_page_size(g),
pte_w[1], pte_w[0]);