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gpu: nvgpu: fix DVR issues in priv ring unit

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1. Add doxygen for priv ring gops: decode_error_code
2. Update documentation related to enumerated ltc/gpc/fbp.

JIRA NVGPU-6601

Change-Id: I2e05443fa71bd5034dbef6c8a9b24c1409d7cfd8
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2547084
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2560282
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seshendra Gadagottu
2021-06-18 06:38:54 -07:00
committed by mobile promotions
parent b33079d47e
commit 59d6389def
1 changed files with 14 additions and 4 deletions
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18
drivers/gpu/nvgpu/include/nvgpu/gops/priv_ring.h
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@@ -108,7 +108,7 @@ struct gops_priv_ring {
* @param g [in] Pointer to GPU driver struct.
*
* This function returns number of enumerated ltc chiplets after
* floor-sweeping.
* the enumeration step of enable_priv_ring.
*
* @return U32 Number of ltc units.
*/
@@ -121,7 +121,7 @@ struct gops_priv_ring {
* @param g [in] Pointer to GPU driver struct.
*
* This function returns number of enumerated gpc chiplets after
* floor-sweeping.
* the enumeration step of enable_priv_ring.
*
* @return U32 Number of gpc units.
*/
@@ -133,14 +133,24 @@ struct gops_priv_ring {
* @param g [in] Pointer to GPU driver struct.
*
* This function returns number of enumerated fbp chiplets after
* floor-sweeping.
* the enumeration step of enable_priv_ring.
*
* @return U32 Number of fbp units.
*/
u32 (*get_fbp_count)(struct gk20a *g);
/** @cond DOXYGEN_SHOULD_SKIP_THIS */
/**
* @brief Decodes priv ring error code.
*
* @param g [in] Pointer to GPU driver struct.
* @param error_code [in] Priv error code reported from h/w.
*
* This function decodes and prints appropriate error message for
* priv error_code reported by h/w.
*/
void (*decode_error_code)(struct gk20a *g, u32 error_code);
/** @cond DOXYGEN_SHOULD_SKIP_THIS */
#ifdef CONFIG_NVGPU_PROFILER
void (*read_pri_fence)(struct gk20a *g);
#endif