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gpu: nvgpu: gr_priv header include cleanup

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Add more apis in gr_utils for accessing variables within gr struct.
This helps to avoid including gr_priv.h outside gr files and
derefencing gr struct.

Jira NVGPU-3218

Change-Id: I6f24cc302f10aa1da14a981d80c400a027c9a115
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2115930
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vinod G
2019-05-09 14:32:05 -07:00
committed by mobile promotions
parent e615e8f0ff
commit 5c60645cfa
17 changed files with 155 additions and 62 deletions
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8
drivers/gpu/nvgpu/common/gr/gr_intr.c
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@@ -35,8 +35,8 @@
#include <nvgpu/gr/config.h>
#include <nvgpu/gr/gr_falcon.h>
#include <nvgpu/gr/fecs_trace.h>
#include <nvgpu/gr/gr_utils.h>
#include "gr_priv.h"
#include "gr_intr_priv.h"
static void gr_intr_report_ctxsw_error(struct gk20a *g, u32 err_type, u32 chid,
@@ -236,7 +236,7 @@ struct nvgpu_channel *nvgpu_gr_intr_get_channel_from_ctx(struct gk20a *g,
u32 curr_ctx, u32 *curr_tsgid)
{
struct nvgpu_fifo *f = &g->fifo;
struct nvgpu_gr_intr *intr = g->gr->intr;
struct nvgpu_gr_intr *intr = nvgpu_gr_get_intr_ptr(g);
u32 chid;
u32 tsgid = NVGPU_INVALID_TSG_ID;
u32 i;
@@ -694,7 +694,7 @@ int nvgpu_gr_intr_stall_isr(struct gk20a *g)
struct nvgpu_tsg *tsg = NULL;
u32 global_esr = 0;
u32 chid;
struct nvgpu_gr_config *gr_config = g->gr->config;
struct nvgpu_gr_config *gr_config = nvgpu_gr_get_config_ptr(g);
u32 gr_intr = g->ops.gr.intr.read_pending_interrupts(g, &intr_info);
u32 clear_intr = gr_intr;
@@ -881,7 +881,7 @@ int nvgpu_gr_intr_stall_isr(struct gk20a *g)
/* invalidate channel lookup tlb */
void nvgpu_gr_intr_flush_channel_tlb(struct gk20a *g)
{
struct nvgpu_gr_intr *intr = g->gr->intr;
struct nvgpu_gr_intr *intr = nvgpu_gr_get_intr_ptr(g);
nvgpu_spinlock_acquire(&intr->ch_tlb_lock);
(void) memset(intr->chid_tlb, 0,