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gpu: nvgpu: gv11b: preempt runlist if tsg preempt times out
-Even though tsg preempt timed out, teardown sequence would by design require s/w to issue another preempt. If recovery includes an ENGINE_RESET, to not have race conditions, use RUNLIST_PREEMPT to kick all work off, and cancel any context load which may be pending. This is also needed to make sure that all PBDMAs serving the engine are not loaded when engine is reset -Add max retries for pre-si platforms for runlist preempt done polling loop Bug 2125776 Bug 2108544 Bug 2105322 Bug 2092051 Bug 2048824 Bug 2043838 Bug 2039587 Bug 2028993 Bug 2029245 Bug 2065990 Bug 1945121 Bug 200401707 Bug 200393631 Bug 200327596 Change-Id: If9d1731fc17e7e7281b24a696ea0917cd269498c Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1709902 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -755,10 +755,20 @@ static int gv11b_fifo_poll_runlist_preempt_pending(struct gk20a *g,
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struct nvgpu_timeout timeout;
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u32 delay = GR_IDLE_CHECK_DEFAULT;
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int ret = -EBUSY;
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unsigned int loop_count = 0;
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nvgpu_timeout_init(g, &timeout, g->ops.fifo.get_preempt_timeout(g),
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NVGPU_TIMER_CPU_TIMER);
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do {
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if (!nvgpu_platform_is_silicon(g)) {
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if (loop_count >= MAX_PRE_SI_RETRIES) {
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nvgpu_err(g, "preempt runlist retries: %u",
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loop_count);
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break;
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}
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loop_count++;
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}
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if (!((gk20a_readl(g, fifo_runlist_preempt_r())) &
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runlists_mask)) {
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ret = 0;
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@@ -768,8 +778,11 @@ static int gv11b_fifo_poll_runlist_preempt_pending(struct gk20a *g,
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nvgpu_usleep_range(delay, delay * 2);
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delay = min_t(unsigned long,
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delay << 1, GR_IDLE_CHECK_MAX);
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} while (!nvgpu_timeout_expired_msg(&timeout,
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"runlist preempt timeout"));
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} while (!nvgpu_timeout_expired(&timeout));
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if (ret)
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nvgpu_err(g, "preempt runlist timeout, runlists_mask:0x%08x",
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runlists_mask);
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return ret;
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}
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@@ -1068,6 +1081,7 @@ void gv11b_fifo_teardown_ch_tsg(struct gk20a *g, u32 act_eng_bitmask,
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runlists_mask = gv11b_fifo_get_runlists_mask(g, act_eng_bitmask, id,
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id_type, rc_type, mmfault);
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/* Disable runlist scheduler */
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gk20a_fifo_set_runlist_state(g, runlists_mask, RUNLIST_DISABLED);
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g->fifo.deferred_reset_pending = false;
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@@ -1111,9 +1125,21 @@ void gv11b_fifo_teardown_ch_tsg(struct gk20a *g, u32 act_eng_bitmask,
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else if (refch)
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g->ops.fifo.disable_channel(refch);
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/* Preempt tsg/ch */
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/*
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* Even though TSG preempt timed out, the RC sequence would by design
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* require s/w to issue another preempt.
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* If recovery includes an ENGINE_RESET, to not have race conditions,
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* use RUNLIST_PREEMPT to kick all work off, and cancel any context
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* load which may be pending. This is also needed to make sure
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* that all PBDMAs serving the engine are not loaded when engine is
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* reset.
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*/
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if (id_type == ID_TYPE_TSG || id_type == ID_TYPE_CHANNEL) {
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g->ops.fifo.preempt_ch_tsg(g, id, id_type);
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int preempt_failed;
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preempt_failed = g->ops.fifo.preempt_ch_tsg(g, id, id_type);
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if (preempt_failed)
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gv11b_fifo_locked_preempt_runlists(g, runlists_mask);
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} else {
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gv11b_fifo_locked_preempt_runlists(g, runlists_mask);
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}
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