gpu: nvgpu: halt gr pipe & gr_reset do not work on fmodel

Do not halt gr pipe as it will hang simulator.
Also during ch/tsg teardown, gr_reset without halting
gr pipe crashes simulator.

Bug 1958308

Change-Id: I4036b4a4999932f05a0f292d4fc51de21d3a030a
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1566575
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2017-09-22 09:19:05 -07:00
committed by mobile promotions
parent 15e259bc52
commit 5d260a24a5

View File

@@ -1237,16 +1237,21 @@ void gk20a_fifo_reset_engine(struct gk20a *g, u32 engine_id)
if (g->ops.fecs_trace.reset)
g->ops.fecs_trace.reset(g);
#endif
/* HALT_PIPELINE method, halt GR engine. */
if (gr_gk20a_halt_pipe(g))
nvgpu_err(g, "failed to HALT gr pipe");
/*
* Resetting engine using mc_enable_r() is not enough; we must
* do full init sequence.
*/
gk20a_gr_reset(g);
if (!nvgpu_platform_is_simulation(g)) {
/*HALT_PIPELINE method, halt GR engine*/
if (gr_gk20a_halt_pipe(g))
nvgpu_err(g, "failed to HALT gr pipe");
/*
* resetting engine using mc_enable_r() is not
* enough, we do full init sequence
*/
nvgpu_log(g, gpu_dbg_info, "resetting gr engine");
gk20a_gr_reset(g);
} else {
nvgpu_log(g, gpu_dbg_info,
"HALT gr pipe not supported and "
"gr cannot be reset without halting gr pipe");
}
if (g->support_pmu && g->can_elpg)
nvgpu_pmu_enable_elpg(g);
}