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gpu: nvgpu: Fix MISRA violation in ACR safety code
- Fix directive 4.7 violation Test the return value "err" of the function. - Fix Rule 16.1 and 16.3 MISRA violations Add break-statement in "default" case. JIRA NVGPU-3571 Change-Id: I57b098361ecefe6b69061063d1f52cda88fced18 Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2134182 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -102,6 +102,9 @@ int nvgpu_acr_construct_execute(struct gk20a *g, struct nvgpu_acr *acr)
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}
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err = nvgpu_acr_bootstrap_hs_acr(g, acr);
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if (err != 0) {
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nvgpu_err(g, "Bootstrap HS ACR failed");
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}
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done:
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return err;
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@@ -103,6 +103,7 @@ int nvgpu_acr_lsf_fecs_ucode_details_v1(struct gk20a *g, void *lsf_ucode_img)
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break;
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default:
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nvgpu_err(g, "no support for GPUID %x", ver);
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break;
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}
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if (fecs_sig == NULL) {
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@@ -192,6 +193,7 @@ int nvgpu_acr_lsf_gpccs_ucode_details_v1(struct gk20a *g, void *lsf_ucode_img)
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break;
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default:
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nvgpu_err(g, "no support for GPUID %x", ver);
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break;
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}
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if (gpccs_sig == NULL) {
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