gpu: nvgpu: Fix MISRA violation in ACR safety code

- Fix directive 4.7 violation
  Test the return value "err" of the function.

- Fix Rule 16.1 and 16.3 MISRA violations
  Add break-statement in "default" case.

JIRA NVGPU-3571

Change-Id: I57b098361ecefe6b69061063d1f52cda88fced18
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2134182
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Divya Singhatwaria
2019-06-06 15:13:52 +05:30
committed by mobile promotions
parent a6cbfca58c
commit 5eab914e34
2 changed files with 5 additions and 0 deletions

View File

@@ -102,6 +102,9 @@ int nvgpu_acr_construct_execute(struct gk20a *g, struct nvgpu_acr *acr)
}
err = nvgpu_acr_bootstrap_hs_acr(g, acr);
if (err != 0) {
nvgpu_err(g, "Bootstrap HS ACR failed");
}
done:
return err;

View File

@@ -103,6 +103,7 @@ int nvgpu_acr_lsf_fecs_ucode_details_v1(struct gk20a *g, void *lsf_ucode_img)
break;
default:
nvgpu_err(g, "no support for GPUID %x", ver);
break;
}
if (fecs_sig == NULL) {
@@ -192,6 +193,7 @@ int nvgpu_acr_lsf_gpccs_ucode_details_v1(struct gk20a *g, void *lsf_ucode_img)
break;
default:
nvgpu_err(g, "no support for GPUID %x", ver);
break;
}
if (gpccs_sig == NULL) {