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gpu: nvgpu: Use sw ops for PMU PG unit

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Some functions are not accessing hardware directly
but are being called using HAL ops: For example

g->ops.pmu.pmu_elpg_statistics,
g->ops.pmu.pmu_pg_init_param,
g->ops.pmu.pmu_pg_supported_engines_list,
g->ops.pmu.pmu_pg_engines_feature_list,
g->ops.pmu.pmu_is_lpwr_feature_supported,
g->ops.pmu.pmu_lpwr_enable_pg,
g->ops.pmu.pmu_lpwr_disable_pg,
g->ops.pmu.pmu_pg_param_post_init,
g->ops.pmu.save_zbc

Change the function access by using sw ops, like:
Create new functions:

int nvgpu_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id,
		struct pmu_pg_stats_data *pg_stat_data);
void nvgpu_pmu_save_zbc(struct gk20a *g, u32 entries);
bool nvgpu_pmu_is_lpwr_feature_supported(struct gk20a *g,
			u32 feature_id);

JIRA NVGPU-3209

Change-Id: I6db9b43c7c4a5054720a72487302b740b091044d
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2110963
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Divya Singhatwaria
2019-05-02 11:31:41 +05:30
committed by mobile promotions
parent 8e86bcfdfe
commit 5ec94e4a98
19 changed files with 173 additions and 96 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/gpu/nvgpu/hal/init/hal_gv11b.c
View File

@@ -1016,13 +1016,8 @@ static const struct gpu_ops gv11b_ops = {
.pmu_mutex_acquire = gk20a_pmu_mutex_acquire,
.pmu_mutex_release = gk20a_pmu_mutex_release,
/* power-gating */
.pmu_pg_init_param = gv11b_pg_gr_init,
.pmu_setup_elpg = gv11b_pmu_setup_elpg,
.pmu_pg_idle_counter_config = gk20a_pmu_pg_idle_counter_config,
.pmu_pg_supported_engines_list = gm20b_pmu_pg_engines_list,
.pmu_pg_engines_feature_list = gm20b_pmu_pg_feature_list,
.pmu_pg_set_sub_feature_mask = gv11b_pg_set_subfeature_mask,
.pmu_elpg_statistics = gp106_pmu_elpg_statistics,
.pmu_dump_elpg_stats = gk20a_pmu_dump_elpg_stats,
/* perfmon */
.pmu_init_perfmon_counter = gk20a_pmu_init_perfmon_counter,
@@ -1033,8 +1028,7 @@ static const struct gpu_ops gv11b_ops = {
/* debug */
.dump_secure_fuses = pmu_dump_security_fuses_gm20b,
.pmu_dump_falcon_stats = gk20a_pmu_dump_falcon_stats,
/* PMU uocde */
.save_zbc = gm20b_pmu_save_zbc,
/* PMU ucode */
.pmu_clear_bar0_host_err_status =
gm20b_clear_pmu_bar0_host_err_status,
.bar0_error_status = gk20a_pmu_bar0_error_status,