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gpu: nvgpu: Use sw ops for PMU PG unit

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Some functions are not accessing hardware directly
but are being called using HAL ops: For example

g->ops.pmu.pmu_elpg_statistics,
g->ops.pmu.pmu_pg_init_param,
g->ops.pmu.pmu_pg_supported_engines_list,
g->ops.pmu.pmu_pg_engines_feature_list,
g->ops.pmu.pmu_is_lpwr_feature_supported,
g->ops.pmu.pmu_lpwr_enable_pg,
g->ops.pmu.pmu_lpwr_disable_pg,
g->ops.pmu.pmu_pg_param_post_init,
g->ops.pmu.save_zbc

Change the function access by using sw ops, like:
Create new functions:

int nvgpu_pmu_elpg_statistics(struct gk20a *g, u32 pg_engine_id,
		struct pmu_pg_stats_data *pg_stat_data);
void nvgpu_pmu_save_zbc(struct gk20a *g, u32 entries);
bool nvgpu_pmu_is_lpwr_feature_supported(struct gk20a *g,
			u32 feature_id);

JIRA NVGPU-3209

Change-Id: I6db9b43c7c4a5054720a72487302b740b091044d
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2110963
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Divya Singhatwaria
2019-05-02 11:31:41 +05:30
committed by mobile promotions
parent 8e86bcfdfe
commit 5ec94e4a98
19 changed files with 173 additions and 96 deletions
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1
drivers/gpu/nvgpu/hal/init/hal_tu104.c
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@@ -1075,7 +1075,6 @@ static const struct gpu_ops tu104_ops = {
.pmu_get_queue_head_size = pwr_pmu_queue_head__size_1_v,
.pmu_reset = nvgpu_pmu_reset,
.pmu_queue_head = gk20a_pmu_queue_head,
.pmu_pg_param_post_init = nvgpu_lpwr_post_init,
.pmu_get_queue_tail_size = pwr_pmu_queue_tail__size_1_v,
.reset_engine = gp106_pmu_engine_reset,
.write_dmatrfbase = gp10b_write_dmatrfbase,