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nvgpu: unit: Add new mock register framework

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Many tests used various incarnations of the mock register framework.
This was based on a dump of gv11b registers. Tests that greatly
benefitted from having generally sane register values all rely
heavily on this framework.

However, every test essentially did their own thing. This was not
efficient and has caused a some issues in cleaning up the device and
host code.

Therefore introduce a much leaner and simplified register framework.
All unit tests now automatically get a good subset of the gv11b
registers auto-populated. As part of this also populate the HAL with
a nvgpu_detect_chip() call. Many tests can now _probably_ have all
their HAL init (except dummy HAL stuff) deleted. But this does
require a few fixups here and there to set HALs to NULL where tests
expect HALs to be NULL by default.

Where necessary HALs are cleared with a memset to prevent unwanted
code from executing.

Overall, this imposes a far smaller burden on tests to initialize
their environments.

Something to consider for the future, though, is how to handle
supporting multiple chips in the unit test world.

JIRA NVGPU-5422

Change-Id: Icf1a63f728e9c5671ee0fdb726c235ffbd2843e2
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2335334
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Alex Waterman
2020-04-27 16:46:52 -05:00
parent b8f398f6a7
commit 5f0fdf085c
66 changed files with 365 additions and 1519 deletions
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38
userspace/units/rc/nvgpu-rc.c
View File

@@ -88,48 +88,22 @@ int test_rc_init(struct unit_module *m, struct gk20a *g, void *args)
unit_return_fail(m, "fifo reg_space failure");
}
/*
* HAL init parameters for gv11b
*/
g->params.gpu_arch = NV_PMC_BOOT_0_ARCHITECTURE_GV110;
g->params.gpu_impl = NV_PMC_BOOT_0_IMPLEMENTATION_B;
/*
* HAL init required for getting
* the sync ops initialized.
*/
ret = nvgpu_init_hal(g);
if (ret != 0) {
unit_err(m, "failed to init hal");
goto clean_regspace;
}
g->ops.gr.init.get_no_of_sm = stub_gv11b_gr_init_get_no_of_sm;
g->ops.ecc.ecc_init_support(g);
g->ops.mm.init_mm_support(g);
ret = nvgpu_fifo_init_support(g);
if (ret != 0) {
unit_err(m , "failed to init fifo support");
goto clean_regspace;
}
nvgpu_assert(ret == 0);
/* Do not allocate from vidmem */
nvgpu_set_enabled(g, NVGPU_MM_UNIFIED_MEMORY, true);
ret = nvgpu_runlist_setup_sw(g);
if (ret != 0) {
unit_err(m, "failed runlist setup_sw");
goto clean_regspace;
}
nvgpu_assert(ret == 0);
tsg = nvgpu_tsg_open(g, getpid());
if (tsg == NULL) {
ret = UNIT_FAIL;
unit_err(m, "failed tsg open");
goto clean_regspace;
}
nvgpu_assert(tsg != NULL);
ch = nvgpu_channel_open_new(g, NVGPU_INVALID_RUNLIST_ID, false,
getpid(), getpid());
@@ -163,8 +137,6 @@ clear_channel:
clear_tsg:
nvgpu_ref_put(&tsg->refcount, nvgpu_tsg_release);
tsg = NULL;
clean_regspace:
test_fifo_cleanup_gv11b_reg_space(m, g);
return ret;
}
@@ -194,8 +166,6 @@ int test_rc_deinit(struct unit_module *m, struct gk20a *g, void *args)
g->fifo.remove_support(&g->fifo);
}
test_fifo_cleanup_gv11b_reg_space(m, g);
return ret;
}
@@ -473,4 +443,4 @@ struct unit_module_test nvgpu_rc_tests[] = {
UNIT_TEST(rc_deinit, test_rc_deinit, NULL, 0),
};
UNIT_MODULE(nvgpu-rc, nvgpu_rc_tests, UNIT_PRIO_NVGPU_TEST);
UNIT_MODULE(nvgpu-rc, nvgpu_rc_tests, UNIT_PRIO_NVGPU_TEST);