gpu: nvgpu: Remove NVGPU_SUPPORT_NVS_CTRL_FIFO

Now that we are planning to enable CTRL_FIFO support with NVS,
there is no need for a separate enabled flag for the same.

CTRL_FIFO support is instead determined by the presence of
NVGPU_SUPPORT_NVS enable flag alone.

For non-auto platforms, Control-Fifo can be disabled by restricting
access to /dev/nvsched_ctrl_fifo.

Jira NVGPU-8619

Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Change-Id: I9dbec60e5668f38e1460c43800584e88b16a2550
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2814435
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Debarshi Dutta
2022-11-23 10:30:28 +05:30
committed by mobile promotions
parent e583e4a6dc
commit 63e8de5106
7 changed files with 3 additions and 10 deletions

View File

@@ -710,7 +710,7 @@ int nvgpu_nvs_open(struct gk20a *g)
nvgpu_atomic64_set(&g->scheduler->id_counter, 0);
nvgpu_smp_wmb();
if (nvgpu_is_enabled(g, NVGPU_SUPPORT_NVS_CTRL_FIFO)) {
if (nvgpu_is_enabled(g, NVGPU_SUPPORT_NVS)) {
g->sched_ctrl_fifo = nvgpu_nvs_ctrl_fifo_create(g);
if (g->sched_ctrl_fifo == NULL) {
err = -ENOMEM;

View File

@@ -221,7 +221,6 @@ struct gk20a;
DEFINE_FLAG(NVGPU_SUPPORT_ROP_IN_GPC, "ROP is part of GPC"), \
DEFINE_FLAG(NVGPU_SUPPORT_BUFFER_METADATA, "Buffer metadata support"), \
DEFINE_FLAG(NVGPU_SUPPORT_NVS, "Domain scheduler support"), \
DEFINE_FLAG(NVGPU_SUPPORT_NVS_CTRL_FIFO, "Domain scheduler control support"), \
DEFINE_FLAG(NVGPU_SUPPORT_TEGRA_RAW, \
"TEGRA_RAW format support"), \
DEFINE_FLAG(NVGPU_SUPPORT_EMULATE_MODE, \

View File

@@ -137,7 +137,6 @@ static void nvgpu_init_vars(struct gk20a *g)
nvgpu_set_enabled(g, NVGPU_HAS_SYNCPOINTS, platform->has_syncpoints);
nvgpu_set_enabled(g, NVGPU_SUPPORT_NVS, true);
nvgpu_set_enabled(g, NVGPU_SUPPORT_NVS_CTRL_FIFO, true);
}
static void nvgpu_init_max_comptag(struct gk20a *g)

View File

@@ -338,8 +338,6 @@ static struct nvgpu_flags_mapping flags_mapping[] = {
NVGPU_SUPPORT_BUFFER_METADATA},
{NVGPU_GPU_FLAGS_SUPPORT_NVS,
NVGPU_SUPPORT_NVS},
{NVGPU_GPU_FLAGS_SUPPORT_NVS_SCHED_CTRL_FIFO,
NVGPU_SUPPORT_NVS_CTRL_FIFO},
{NVGPU_GPU_FLAGS_SCHED_EXIT_WAIT_FOR_ERRBAR_SUPPORTED,
NVGPU_SCHED_EXIT_WAIT_FOR_ERRBAR_SUPPORTED},
{NVGPU_GPU_FLAGS_MULTI_PROCESS_TSG_SHARING,

View File

@@ -628,7 +628,7 @@ int nvgpu_nvs_ctrl_fifo_ops_open(struct inode *inode, struct file *filp)
return err;
}
if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_NVS_CTRL_FIFO)) {
if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_NVS)) {
gk20a_idle(g);
return -EOPNOTSUPP;
}
@@ -1115,7 +1115,7 @@ long nvgpu_nvs_ctrl_fifo_ops_ioctl(struct file *filp, unsigned int cmd, unsigned
struct nvgpu_nvs_ctrl_fifo_scheduler_characteristics_args *args =
(struct nvgpu_nvs_ctrl_fifo_scheduler_characteristics_args *)buf;
if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_NVS_CTRL_FIFO)) {
if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_NVS)) {
err = -EOPNOTSUPP;
return err;
}

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@@ -201,8 +201,6 @@ struct nvgpu_gpu_zbc_query_table_args {
#define NVGPU_GPU_FLAGS_SUPPORT_VAB (1ULL << 52)
/* The NVS scheduler interface is usable */
#define NVGPU_GPU_FLAGS_SUPPORT_NVS (1ULL << 53)
/* The NVS control fifo interface is usable */
#define NVGPU_GPU_FLAGS_SUPPORT_NVS_SCHED_CTRL_FIFO (1ULL << 54)
/* Flag to indicate whether implicit ERRBAR is supported */
#define NVGPU_GPU_FLAGS_SCHED_EXIT_WAIT_FOR_ERRBAR_SUPPORTED (1ULL << 55)
/* Flag to indicate whether multi-process TSG sharing is supported */

View File

@@ -332,7 +332,6 @@ int test_nvs_setup_sw(struct unit_module *m,
NVGPU_SETUP_BIND_FLAGS_USERMODE_SUPPORT;
nvgpu_set_enabled(g, NVGPU_SUPPORT_NVS, true);
nvgpu_set_enabled(g, NVGPU_SUPPORT_NVS_CTRL_FIFO, true);
err = nvgpu_nvs_init(g);