gpu: nvgpu: chip specific L2 ECC error support

Adding support for handling of chip specific ECC memory errors

JIRA: GPUT19X-112

Change-Id: I1c04ac1d5233c332b300540eade1b73527c46ff7
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1489020
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

drivers/gpu/nvgpu/gk20a/ecc_gk20a.h

@@ -43,6 +43,13 @@ struct ecc_gk20a {
 		struct ecc_gr_t19x t19x;
 #endif
 	} gr;
+
+	struct {
+#ifdef CONFIG_TEGRA_19x_GPU
+		struct ecc_ltc_t19x t19x;
+#endif
+	} ltc;
+
 };
 
 #endif /*__ECC_GK20A_H__*/

drivers/gpu/nvgpu/gp10b/ecc_gp10b.h

@@ -16,7 +16,7 @@
 #ifndef _NVGPU_ECC_GP10B_H_
 #define _NVGPU_ECC_GP10B_H_
 
-#include <linux/version.h>
+struct gk20a_ecc_stat;
 
 struct ecc_gr_t18x {
 	struct gk20a_ecc_stat sm_lrf_single_err_count;

drivers/gpu/nvgpu/gp10b/ltc_gp10b.c

@@ -123,7 +123,7 @@ static int gp10b_ltc_init_comptags(struct gk20a *g, struct gr_gk20a *gr)
 	return 0;
 }
 
-static void gp10b_ltc_isr(struct gk20a *g)
+void gp10b_ltc_isr(struct gk20a *g)
 {
 	u32 mc_intr, ltc_intr;
 	unsigned int ltc, slice;

drivers/gpu/nvgpu/gp10b/ltc_gp10b.h

@@ -15,5 +15,6 @@
 #define LTC_GP10B_H
 struct gpu_ops;
 
+void gp10b_ltc_isr(struct gk20a *g);
 void gp10b_init_ltc(struct gpu_ops *gops);
 #endif