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gpu: nvgpu: Do not refer to RAM_IN fields in FB

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Do not refer to bit width in RAM_IN field when shifting MMU fault
buffer entries. Export the correct bit shift values for the fields
and shift with that.

Change-Id: I6878118bb14f070626e8244d5044b6818c8ea283
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1801417
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Terje Bergstrom
2018-08-16 12:51:25 -07:00
committed by mobile promotions
parent 6f57a339ee
commit 6662188868
3 changed files with 27 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
drivers/gpu/nvgpu/common/fb/fb_gv11b.c
View File

@@ -46,7 +46,6 @@
#include <nvgpu/hw/gv11b/hw_fb_gv11b.h>
#include <nvgpu/hw/gv11b/hw_mc_gv11b.h>
#include <nvgpu/hw/gv11b/hw_ram_gv11b.h>
#include <nvgpu/hw/gv11b/hw_gmmu_gv11b.h>
static int gv11b_fb_fix_page_fault(struct gk20a *g,
@@ -375,7 +374,7 @@ void gv11b_fb_fault_buf_configure_hw(struct gk20a *g, u32 index)
gv11b_fb_fault_buf_set_state_hw(g, index,
NVGPU_FB_MMU_FAULT_BUF_DISABLED);
addr_lo = u64_lo32(g->mm.hw_fault_buf[index].gpu_va >>
ram_in_base_shift_v());
fb_mmu_fault_buffer_lo_addr_b());
addr_hi = u64_hi32(g->mm.hw_fault_buf[index].gpu_va);
g->ops.fb.write_mmu_fault_buffer_lo_hi(g, index,
@@ -749,7 +748,7 @@ static void gv11b_fb_copy_from_hw_fault_buf(struct gk20a *g,
rd32_val = nvgpu_mem_rd32(g, mem, offset +
gmmu_fault_buf_entry_inst_lo_w());
addr_lo = gmmu_fault_buf_entry_inst_lo_v(rd32_val);
addr_lo = addr_lo << ram_in_base_shift_v();
addr_lo = addr_lo << gmmu_fault_buf_entry_inst_lo_b();
addr_hi = nvgpu_mem_rd32(g, mem, offset +
gmmu_fault_buf_entry_inst_hi_w());
@@ -775,7 +774,7 @@ static void gv11b_fb_copy_from_hw_fault_buf(struct gk20a *g,
mmfault->fault_addr_aperture =
gmmu_fault_buf_entry_addr_phys_aperture_v(rd32_val);
addr_lo = gmmu_fault_buf_entry_addr_lo_v(rd32_val);
addr_lo = addr_lo << ram_in_base_shift_v();
addr_lo = addr_lo << gmmu_fault_buf_entry_addr_lo_b();
rd32_val = nvgpu_mem_rd32(g, mem, offset +
gmmu_fault_buf_entry_addr_hi_w());
@@ -1096,7 +1095,7 @@ static void gv11b_mm_copy_from_fault_snap_reg(struct gk20a *g,
g->ops.fb.read_mmu_fault_inst_lo_hi(g, &reg_val, &addr_hi);
addr_lo = fb_mmu_fault_inst_lo_addr_v(reg_val);
addr_lo = addr_lo << ram_in_base_shift_v();
addr_lo = addr_lo << fb_mmu_fault_inst_lo_addr_b();
addr_hi = fb_mmu_fault_inst_hi_addr_v(addr_hi);
inst_ptr = hi32_lo32_to_u64(addr_hi, addr_lo);
@@ -1121,7 +1120,7 @@ static void gv11b_mm_copy_from_fault_snap_reg(struct gk20a *g,
g->ops.fb.read_mmu_fault_addr_lo_hi(g, &reg_val, &addr_hi);
addr_lo = fb_mmu_fault_addr_lo_addr_v(reg_val);
addr_lo = addr_lo << ram_in_base_shift_v();
addr_lo = addr_lo << fb_mmu_fault_addr_lo_addr_b();
mmfault->fault_addr_aperture =
fb_mmu_fault_addr_lo_phys_aperture_v(reg_val);

14
drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -1112,6 +1112,10 @@ static inline u32 fb_mmu_fault_buffer_lo_addr_v(u32 r)
{
return (r >> 12U) & 0xfffffU;
}
static inline u32 fb_mmu_fault_buffer_lo_addr_b(void)
{
return 12U;
}
static inline u32 fb_mmu_fault_buffer_hi_r(u32 i)
{
return 0x00100e28U + i*20U;
@@ -1340,6 +1344,10 @@ static inline u32 fb_mmu_fault_addr_lo_addr_v(u32 r)
{
return (r >> 12U) & 0xfffffU;
}
static inline u32 fb_mmu_fault_addr_lo_addr_b(void)
{
return 12U;
}
static inline u32 fb_mmu_fault_addr_hi_r(void)
{
return 0x00100e50U;
@@ -1380,6 +1388,10 @@ static inline u32 fb_mmu_fault_inst_lo_addr_v(u32 r)
{
return (r >> 12U) & 0xfffffU;
}
static inline u32 fb_mmu_fault_inst_lo_addr_b(void)
{
return 12U;
}
static inline u32 fb_mmu_fault_inst_hi_r(void)
{
return 0x00100e58U;

10
drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_gmmu_gv11b.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -1320,6 +1320,10 @@ static inline u32 gmmu_fault_buf_entry_inst_lo_v(u32 r)
{
return (r >> 12U) & 0xfffffU;
}
static inline u32 gmmu_fault_buf_entry_inst_lo_b(void)
{
return 12U;
}
static inline u32 gmmu_fault_buf_entry_inst_lo_w(void)
{
return 0U;
@@ -1348,6 +1352,10 @@ static inline u32 gmmu_fault_buf_entry_addr_lo_v(u32 r)
{
return (r >> 12U) & 0xfffffU;
}
static inline u32 gmmu_fault_buf_entry_addr_lo_b(void)
{
return 12U;
}
static inline u32 gmmu_fault_buf_entry_addr_lo_w(void)
{
return 2U;