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gpu: nvgpu: MISRA fix for Rule 10.4

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Change 1 (signed) to 1U (unsigned) for macros
defined in circ_buf.h

JIRA NVGPU-3388

Change-Id: I879ea03755e1e0446dbe55ee01afd58ab3eb8c0f
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2114873
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2019-05-08 12:52:22 -07:00
committed by mobile promotions
parent e7d50bd224
commit 66cc8d97da
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/nvgpu/include/nvgpu/posix/circ_buf.h
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@@ -25,7 +25,7 @@
#include <nvgpu/bug.h>
#define CIRC_CNT(head, tail, size) (((head) - (tail)) & ((size)-1))
#define CIRC_SPACE(head, tail, size) CIRC_CNT((tail), ((head)+1), (size))
#define CIRC_CNT(head, tail, size) (((head) - (tail)) & ((size)-1U))
#define CIRC_SPACE(head, tail, size) CIRC_CNT((tail), ((head)+1U), (size))
#endif /* NVGPU_POSIX_CIRC_BUF_H */