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gpu: nvgpu: compile out ECC feature override in safety

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Overriding of ECC feature is used only in Linux through device
tree fuse overrides. It's not supported in QNX. Hence compile
out below functions from safety build.

nvgpu_gr_get_override_ecc_val()
nvgpu_gr_override_ecc_val()

Move nvgpu_gr_get_golden_image_ptr() under CONFIG_NVGPU_DEBUGGER

Re-arrange all functions in gr_utils.c/h and move all non-safe
functions towards end of file.

Jira NVGPU-4028

Change-Id: Ie56fcf78c32a9b23d2e5f5b51701c5f8ccad62ec
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2199507
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2019-09-16 18:03:10 +05:30
committed by Alex Waterman
parent 3ca62e3d9c
commit 6849526d7f
4 changed files with 40 additions and 27 deletions
Download Patch File Download Diff File Expand all files Collapse all files

48
drivers/gpu/nvgpu/common/gr/gr_utils.c
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@@ -33,12 +33,28 @@ struct nvgpu_gr_falcon *nvgpu_gr_get_falcon_ptr(struct gk20a *g)
return g->gr->falcon;
}
struct nvgpu_gr_obj_ctx_golden_image *nvgpu_gr_get_golden_image_ptr(
struct gk20a *g)
struct nvgpu_gr_config *nvgpu_gr_get_config_ptr(struct gk20a *g)
{
return g->gr->golden_image;
return g->gr->config;
}
struct nvgpu_gr_intr *nvgpu_gr_get_intr_ptr(struct gk20a *g)
{
return g->gr->intr;
}
#ifdef CONFIG_NVGPU_NON_FUSA
u32 nvgpu_gr_get_override_ecc_val(struct gk20a *g)
{
return g->gr->fecs_feature_override_ecc_val;
}
void nvgpu_gr_override_ecc_val(struct gk20a *g, u32 ecc_val)
{
g->gr->fecs_feature_override_ecc_val = ecc_val;
}
#endif
#ifdef CONFIG_NVGPU_GRAPHICS
struct nvgpu_gr_zcull *nvgpu_gr_get_zcull_ptr(struct gk20a *g)
{
@@ -51,16 +67,6 @@ struct nvgpu_gr_zbc *nvgpu_gr_get_zbc_ptr(struct gk20a *g)
}
#endif
struct nvgpu_gr_config *nvgpu_gr_get_config_ptr(struct gk20a *g)
{
return g->gr->config;
}
struct nvgpu_gr_intr *nvgpu_gr_get_intr_ptr(struct gk20a *g)
{
return g->gr->intr;
}
#ifdef CONFIG_NVGPU_FECS_TRACE
struct nvgpu_gr_global_ctx_buffer_desc *nvgpu_gr_get_global_ctx_buffer_ptr(
struct gk20a *g)
@@ -69,16 +75,6 @@ struct nvgpu_gr_global_ctx_buffer_desc *nvgpu_gr_get_global_ctx_buffer_ptr(
}
#endif
u32 nvgpu_gr_get_override_ecc_val(struct gk20a *g)
{
return g->gr->fecs_feature_override_ecc_val;
}
void nvgpu_gr_override_ecc_val(struct gk20a *g, u32 ecc_val)
{
g->gr->fecs_feature_override_ecc_val = ecc_val;
}
#ifdef CONFIG_NVGPU_CILP
u32 nvgpu_gr_get_cilp_preempt_pending_chid(struct gk20a *g)
{
@@ -93,6 +89,12 @@ void nvgpu_gr_clear_cilp_preempt_pending_chid(struct gk20a *g)
#endif
#ifdef CONFIG_NVGPU_DEBUGGER
struct nvgpu_gr_obj_ctx_golden_image *nvgpu_gr_get_golden_image_ptr(
struct gk20a *g)
{
return g->gr->golden_image;
}
struct nvgpu_gr_hwpm_map *nvgpu_gr_get_hwpm_map_ptr(struct gk20a *g)
{
return g->gr->hwpm_map;