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gpu: nvgpu: remove Dynamic TPC-PG code

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- Dynamic TPC-PG feature is not fully implemented and these variables
  are not using anywhere, so removing this code.

  JIRA NVGPU-5849

Change-Id: I4949e991a62e06f4aff10c3fbe7516546e49f55e
Signed-off-by: Seeta Rama Raju <srajum@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2544789
(cherry picked from commit bb28c7d8bfd873283b24e8a1812e23c554cc6c18)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2551208
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seeta Rama Raju
2021-06-14 18:38:08 +05:30
committed by mobile promotions
parent 83d1ae9c0a
commit 6948fa6f4a
3 changed files with 1 additions and 32 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
drivers/gpu/nvgpu/include/nvgpu/tsg.h
View File

@@ -173,19 +173,6 @@ struct nvgpu_tsg {
* the TSG.
*/
pid_t tgid;
/**
* Number of active TPCs as requested by userspace.
* This is used while requesting for dynamic TPC PG (power gating).
* TPC PG is specific to chip.
*/
u32 num_active_tpcs;
/** Set to true if dynamic TPC PG is requested to be enabled. */
bool tpc_pg_enabled;
/**
* Set to true if dynamic TPC PG is enabled and #num_active_tpcs is
* non-zero.
*/
bool tpc_num_initialized;
/**
* Set to true if tsgid is acquired else set to false.
* This is protected by #nvgpu_fifo.tsg_inuse_mutex. Acquire/Release

16
drivers/gpu/nvgpu/os/linux/ioctl_tsg.c
View File

@@ -93,7 +93,6 @@ static int gk20a_tsg_ioctl_bind_channel_ex(struct gk20a *g,
struct nvgpu_tsg *tsg = priv->tsg;
struct nvgpu_sched_ctrl *sched = &g->sched_ctrl;
struct nvgpu_channel *ch;
struct nvgpu_gr_config *gr_config = nvgpu_gr_get_config_ptr(g);
u32 max_subctx_count;
u32 gpu_instance_id;
int err = 0;
@@ -117,21 +116,6 @@ static int gk20a_tsg_ioctl_bind_channel_ex(struct gk20a *g,
goto idle;
}
if (arg->tpc_pg_enabled && (!tsg->tpc_num_initialized)) {
if ((arg->num_active_tpcs >
nvgpu_gr_config_get_max_tpc_count(gr_config)) ||
!(arg->num_active_tpcs)) {
nvgpu_err(g, "Invalid num of active TPCs");
err = -EINVAL;
goto ch_put;
}
tsg->tpc_num_initialized = true;
tsg->num_active_tpcs = arg->num_active_tpcs;
tsg->tpc_pg_enabled = true;
} else {
tsg->tpc_pg_enabled = false; nvgpu_log(g, gpu_dbg_info, "dynamic TPC-PG not enabled");
}
gpu_instance_id = nvgpu_get_gpu_instance_id_from_cdev(g, priv->cdev);
nvgpu_assert(gpu_instance_id < g->mig.num_gpu_instances);

4
include/uapi/linux/nvgpu.h
View File

@@ -35,9 +35,7 @@ struct nvgpu_tsg_bind_channel_ex_args {
/* in: VEID in Volta */
__u32 subcontext_id;
__u32 num_active_tpcs;
__u8 tpc_pg_enabled;
__u8 reserved[11];
__u8 reserved[16];
};
/*