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gpu: nvgpu: Add wrapper over atomic_t and atomic64_t

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- added wrapper structs nvgpu_atomic_t and nvgpu_atomic64_t over
  atomic_t and atomic64_t
- added nvgpu_atomic_* and nvgpu_atomic64_* APIs to access the above
  wrappers.

JIRA NVGPU-121

Change-Id: I61667bb0a84c2fc475365abb79bffb42b8b4786a
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1533641
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Debarshi Dutta
2017-08-06 14:44:11 +05:30
committed by mobile promotions
parent bacbc73312
commit 6ff92bfb6e
1 changed files with 4 additions and 5 deletions
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9
drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
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@@ -315,11 +315,10 @@ void gv11b_dump_channel_status_ramfc(struct gk20a *g,
inst_mem[ram_fc_sem_payload_lo_w()],
inst_mem[ram_fc_sem_execute_w()]);
if (hw_sema)
gk20a_debug_output(o, "SEMA STATE: value: 0x%08x "
"next_val: 0x%08x addr: 0x%010llx\n",
__nvgpu_semaphore_read(hw_sema),
atomic_read(&hw_sema->next_value),
nvgpu_hw_sema_addr(hw_sema));
gk20a_debug_output(o, "SEMA STATE: value: 0x%08x next_val: 0x%08x addr: 0x%010llx\n",
__nvgpu_semaphore_read(hw_sema),
nvgpu_atomic_read(&hw_sema->next_value),
nvgpu_hw_sema_addr(hw_sema));
gk20a_debug_output(o, "\n");
}