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gpu: nvgpu: Rename/clean boardobj unit

Browse Source 
-Removed unwanded boardobj includes
-Renamed functions as struct as per usage

NVGPU-4484

Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Change-Id: I792a4b64075d5e87f911c1073717dbe7107227a1
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2335991
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
rmylavarapu
2020-05-07 14:24:09 +05:30
committed by Alex Waterman
parent 8e545ef04b
commit 700bd83b41
51 changed files with 947 additions and 938 deletions
Download Patch File Download Diff File Expand all files Collapse all files

67
drivers/gpu/nvgpu/common/pmu/boardobj/boardobj.c
View File

@@ -31,18 +31,15 @@
* This has to be explicitly set by each device that extends from the
* board object.
*/
static int destruct_super(struct boardobj *pboardobj)
static int destruct_super(struct pmu_board_obj *obj)
{
struct gk20a *g = pboardobj->g;
nvgpu_log_info(g, " ");
if (pboardobj == NULL) {
if (obj == NULL) {
return -EINVAL;
}
nvgpu_list_del(&pboardobj->node);
if (pboardobj->allocated) {
nvgpu_kfree(pboardobj->g, pboardobj);
nvgpu_list_del(&obj->node);
if (obj->allocated) {
nvgpu_kfree(obj->g, obj);
}
return 0;
@@ -52,52 +49,60 @@ static int destruct_super(struct boardobj *pboardobj)
* check whether the specified BOARDOBJ object implements the queried
* type/class enumeration.
*/
static bool implements_super(struct gk20a *g, struct boardobj *pboardobj,
static bool implements_super(struct gk20a *g, struct pmu_board_obj *obj,
u8 type)
{
nvgpu_log_info(g, " ");
return (0U != (pboardobj->type_mask & BIT32(type)));
return (0U != (obj->type_mask & BIT32(type)));
}
int nvgpu_boardobj_pmu_data_init_super(struct gk20a *g,
struct boardobj *pboardobj, struct nv_pmu_boardobj *pmudata)
int pmu_board_obj_pmu_data_init_super(struct gk20a *g,
struct pmu_board_obj *obj, struct nv_pmu_boardobj *pmu_obj)
{
nvgpu_log_info(g, " ");
if (pboardobj == NULL) {
if (obj == NULL) {
return -EINVAL;
}
if (pmudata == NULL) {
if (pmu_obj == NULL) {
return -EINVAL;
}
pmudata->type = pboardobj->type;
pmu_obj->type = obj->type;
nvgpu_log_info(g, " Done");
return 0;
}
int pmu_boardobj_construct_super(struct gk20a *g, struct boardobj *boardobj_ptr,
void *args)
int pmu_board_obj_construct_super(struct gk20a *g,
struct pmu_board_obj *obj, void *args)
{
struct boardobj *dev_boardobj = (struct boardobj *)args;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)args;
nvgpu_log_info(g, " ");
if ((dev_boardobj == NULL) || (boardobj_ptr == NULL)) {
if ((obj_tmp == NULL) || (obj == NULL)) {
return -EINVAL;
}
boardobj_ptr->allocated = true;
boardobj_ptr->g = g;
boardobj_ptr->type = dev_boardobj->type;
boardobj_ptr->idx = CTRL_BOARDOBJ_IDX_INVALID;
boardobj_ptr->type_mask =
BIT32(boardobj_ptr->type) | dev_boardobj->type_mask;
boardobj_ptr->implements = implements_super;
boardobj_ptr->destruct = destruct_super;
boardobj_ptr->pmudatainit = nvgpu_boardobj_pmu_data_init_super;
nvgpu_list_add(&boardobj_ptr->node, &g->boardobj_head);
obj->allocated = true;
obj->g = g;
obj->type = obj_tmp->type;
obj->idx = CTRL_BOARDOBJ_IDX_INVALID;
obj->type_mask =
BIT32(obj->type) | obj_tmp->type_mask;
obj->implements = implements_super;
obj->destruct = destruct_super;
obj->pmudatainit = pmu_board_obj_pmu_data_init_super;
nvgpu_list_add(&obj->node, &g->boardobj_head);
return 0;
}
u8 pmu_board_obj_get_type(void *obj)
{
return (((struct pmu_board_obj *)(obj))->type);
}
u8 pmu_board_obj_get_idx(void *obj)
{
return (((struct pmu_board_obj *)(obj))->idx);
}

54
drivers/gpu/nvgpu/common/pmu/boardobj/boardobj.h
View File

@@ -23,26 +23,11 @@
#ifndef NVGPU_BOARDOBJ_H
#define NVGPU_BOARDOBJ_H
struct boardobj;
struct pmu_board_obj;
struct nvgpu_list_node;
struct gk20a;
struct nv_pmu_boardobj;
/*
* Fills out the appropriate the nv_pmu_xxxx_device_desc_<xyz> driver->PMU
* description structure, describing this BOARDOBJ board device to the PMU.
*
*/
int nvgpu_boardobj_pmu_data_init_super(struct gk20a *g, struct boardobj
*pboardobj, struct nv_pmu_boardobj *pmudata);
/*
* Constructor for the base Board Object. Called by each device-specific
* implementation of the BOARDOBJ interface to initialize the board object.
*/
int pmu_boardobj_construct_super(struct gk20a *g, struct boardobj *ppboardobj,
void *args);
/*
* Base Class for all physical or logical device on the PCB.
* Contains fields common to all devices on the board. Specific types of
@@ -50,7 +35,7 @@ int pmu_boardobj_construct_super(struct gk20a *g, struct boardobj *ppboardobj,
* device or device-type.
*/
struct boardobj {
struct pmu_board_obj {
struct gk20a *g;
u8 type; /*type of the device*/
@@ -58,21 +43,18 @@ struct boardobj {
/* true if allocated in constructor. destructor should free */
bool allocated;
u32 type_mask; /*mask of types this boardobjimplements*/
bool (*implements)(struct gk20a *g, struct boardobj *pboardobj,
bool (*implements)(struct gk20a *g, struct pmu_board_obj *obj,
u8 type);
int (*destruct)(struct boardobj *pboardobj);
int (*destruct)(struct pmu_board_obj *obj);
/*
* Access interface apis which will be overridden by the devices
* that inherit from BOARDOBJ
*/
int (*pmudatainit)(struct gk20a *g, struct boardobj *pboardobj,
struct nv_pmu_boardobj *pmudata);
int (*pmudatainit)(struct gk20a *g, struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj);
struct nvgpu_list_node node;
};
#define BOARDOBJ_GET_TYPE(pobj) (((struct boardobj *)(void *)(pobj))->type)
#define BOARDOBJ_GET_IDX(pobj) (((struct boardobj *)(void *)(pobj))->idx)
#define HIGHESTBITIDX_32(n32) \
{ \
u32 count = 0U; \
@@ -126,11 +108,29 @@ struct boardobj {
(n32) = idx; \
}
static inline struct boardobj *
/*
* Fills out the appropriate the nv_pmu_xxxx_device_desc_<xyz> driver->PMU
* description structure, describing this BOARDOBJ board device to the PMU.
*
*/
int pmu_board_obj_pmu_data_init_super(struct gk20a *g, struct pmu_board_obj
*obj, struct nv_pmu_boardobj *pmu_obj);
/*
* Constructor for the base Board Object. Called by each device-specific
* implementation of the BOARDOBJ interface to initialize the board object.
*/
int pmu_board_obj_construct_super(struct gk20a *g, struct pmu_board_obj
*obj, void *args);
static inline struct pmu_board_obj *
boardobj_from_node(struct nvgpu_list_node *node)
{
return (struct boardobj *)
((uintptr_t)node - offsetof(struct boardobj, node));
return (struct pmu_board_obj *)
((uintptr_t)node - offsetof(struct pmu_board_obj, node));
};
u8 pmu_board_obj_get_type(void *obj);
u8 pmu_board_obj_get_idx(void *obj);
#endif /* NVGPU_BOARDOBJ_H */

54
drivers/gpu/nvgpu/common/pmu/boardobj/boardobjgrp.c
View File

@@ -61,7 +61,7 @@ static int check_boardobjgrp_param(struct gk20a *g,
*/
static int
obj_insert_final(struct boardobjgrp *pboardobjgrp,
struct boardobj *pboardobj, u8 index)
struct pmu_board_obj *obj, u8 index)
{
struct gk20a *g = pboardobjgrp->g;
@@ -71,7 +71,7 @@ obj_insert_final(struct boardobjgrp *pboardobjgrp,
return -EINVAL;
}
if (pboardobj == NULL) {
if (obj == NULL) {
return -EINVAL;
}
@@ -87,14 +87,14 @@ obj_insert_final(struct boardobjgrp *pboardobjgrp,
* Check that this BOARDOBJ has not already been added to a
* BOARDOBJGRP
*/
if (pboardobj->idx != CTRL_BOARDOBJ_IDX_INVALID) {
if (obj->idx != CTRL_BOARDOBJ_IDX_INVALID) {
return -EINVAL;
}
pboardobjgrp->ppobjects[index] = pboardobj;
pboardobjgrp->ppobjects[index] = obj;
pboardobjgrp->objmaxidx = (u8)(BOARDOBJGRP_IS_EMPTY(pboardobjgrp) ?
index : max(pboardobjgrp->objmaxidx, index));
pboardobj->idx = index;
obj->idx = index;
pboardobjgrp->objmask |= BIT32(index);
@@ -106,7 +106,7 @@ obj_insert_final(struct boardobjgrp *pboardobjgrp,
/*
* Retrieves a Board Object from a Board Object Group using the group's index.
*/
static struct boardobj *obj_get_by_idx_final(
static struct pmu_board_obj *obj_get_by_idx_final(
struct boardobjgrp *pboardobjgrp, u8 index)
{
if (!boardobjgrp_idxisvalid(pboardobjgrp, index)) {
@@ -119,11 +119,11 @@ static struct boardobj *obj_get_by_idx_final(
* Retrieve Board Object immediately following one pointed by @ref currentindex
* filtered out by the provided mask. If (mask == NULL) => no filtering.
*/
static struct boardobj *obj_get_next_final(
static struct pmu_board_obj *obj_get_next_final(
struct boardobjgrp *pboardobjgrp, u8 *currentindex,
struct boardobjgrpmask *mask)
{
struct boardobj *pboardobjnext = NULL;
struct pmu_board_obj *obj_next = NULL;
u8 objmaxidx;
u8 index;
@@ -154,13 +154,13 @@ static struct boardobj *obj_get_next_final(
if (objmaxidx != CTRL_BOARDOBJ_IDX_INVALID) {
for (; index <= objmaxidx; index++) {
pboardobjnext = pboardobjgrp->ppobjects[index];
if (pboardobjnext != NULL) {
obj_next = pboardobjgrp->ppobjects[index];
if (obj_next != NULL) {
/* Filter results using client provided mask.*/
if (mask != NULL) {
if (!nvgpu_boardobjgrpmask_bit_get(mask,
index)) {
pboardobjnext = NULL;
obj_next = NULL;
continue;
}
}
@@ -170,12 +170,12 @@ static struct boardobj *obj_get_next_final(
}
}
return pboardobjnext;
return obj_next;
}
static int pmu_data_inst_get_stub(struct gk20a *g,
struct nv_pmu_boardobjgrp *boardobjgrppmu,
struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx)
struct nv_pmu_boardobj **pmu_obj, u8 idx)
{
nvgpu_log_info(g, " ");
return -EINVAL;
@@ -184,7 +184,7 @@ static int pmu_data_inst_get_stub(struct gk20a *g,
static int pmu_status_inst_get_stub(struct gk20a *g,
void *pboardobjgrppmu,
struct nv_pmu_boardobj_query **ppBoardobjpmustatus, u8 idx)
struct nv_pmu_boardobj_query **obj_pmu_status, u8 idx)
{
nvgpu_log_info(g, " ");
return -EINVAL;
@@ -243,7 +243,7 @@ static int pmu_cmd_destroy_impl(struct gk20a *g,
static int destruct_super(struct boardobjgrp *pboardobjgrp)
{
struct boardobj *pboardobj;
struct pmu_board_obj *obj;
struct gk20a *g = pboardobjgrp->g;
int status = 0;
int stat;
@@ -258,7 +258,7 @@ static int destruct_super(struct boardobjgrp *pboardobjgrp)
return -EINVAL;
}
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) {
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct pmu_board_obj*, obj, index) {
stat = pboardobjgrp->objremoveanddestroy(pboardobjgrp, index);
if (status == 0) {
status = stat;
@@ -646,8 +646,8 @@ int nvgpu_boardobjgrp_pmu_data_init_legacy(struct gk20a *g,
struct nv_pmu_boardobjgrp_super *pboardobjgrppmu)
{
int status = 0;
struct boardobj *pboardobj = NULL;
struct nv_pmu_boardobj *ppmudata = NULL;
struct pmu_board_obj *obj = NULL;
struct nv_pmu_boardobj *pmu_obj = NULL;
u8 index;
nvgpu_log_info(g, " ");
@@ -665,8 +665,8 @@ int nvgpu_boardobjgrp_pmu_data_init_legacy(struct gk20a *g,
BOARDOBJGRP_FOR_EACH_INDEX_IN_MASK(32, index, pboardobjgrp->objmask) {
/* Obtain pointer to the current instance of the
* Object from the Group */
pboardobj = pboardobjgrp->objgetbyidx(pboardobjgrp, index);
if (NULL == pboardobj) {
obj = pboardobjgrp->objgetbyidx(pboardobjgrp, index);
if (NULL == obj) {
nvgpu_err(g, "could not get object instance");
status = -EINVAL;
goto nvgpu_boardobjgrp_pmu_data_init_legacy_exit;
@@ -675,14 +675,14 @@ int nvgpu_boardobjgrp_pmu_data_init_legacy(struct gk20a *g,
status = pboardobjgrp->pmudatainstget(g,
(struct nv_pmu_boardobjgrp *)
(void *)pboardobjgrppmu,
&ppmudata, index);
&pmu_obj, index);
if (status != 0) {
nvgpu_err(g, "could not get object instance");
goto nvgpu_boardobjgrp_pmu_data_init_legacy_exit;
}
/* Initialize the PMU Data */
status = pboardobj->pmudatainit(g, pboardobj, ppmudata);
status = obj->pmudatainit(g, obj, pmu_obj);
if (status != 0) {
nvgpu_err(g,
"could not parse pmu for device %d", index);
@@ -701,8 +701,8 @@ int nvgpu_boardobjgrp_pmu_data_init_super(struct gk20a *g, struct boardobjgrp
*pboardobjgrp, struct nv_pmu_boardobjgrp_super *pboardobjgrppmu)
{
int status = 0;
struct boardobj *pboardobj = NULL;
struct nv_pmu_boardobj *ppmudata = NULL;
struct pmu_board_obj *obj = NULL;
struct nv_pmu_boardobj *pmu_obj = NULL;
u8 index;
nvgpu_log_info(g, " ");
@@ -722,17 +722,17 @@ int nvgpu_boardobjgrp_pmu_data_init_super(struct gk20a *g, struct boardobjgrp
goto boardobjgrp_pmu_data_init_super_exit;
}
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) {
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct pmu_board_obj*, obj, index) {
status = pboardobjgrp->pmudatainstget(g,
(struct nv_pmu_boardobjgrp *)
(void *)pboardobjgrppmu, &ppmudata, index);
(void *)pboardobjgrppmu, &pmu_obj, index);
if (status != 0) {
nvgpu_err(g, "could not get object instance");
goto boardobjgrp_pmu_data_init_super_exit;
}
/* Initialize the PMU Data and send to PMU */
status = pboardobj->pmudatainit(g, pboardobj, ppmudata);
status = obj->pmudatainit(g, obj, pmu_obj);
if (status != 0) {
nvgpu_err(g,
"could not parse pmu for device %d", index);

2
drivers/gpu/nvgpu/common/pmu/clk/clk.h
View File

@@ -51,7 +51,7 @@ struct nvgpu_clk_pmupstate {
};
struct clk_vf_point {
struct boardobj super;
struct pmu_board_obj super;
u8 vfe_equ_idx;
u8 volt_rail_idx;
struct ctrl_clk_vf_pair pair;

173
drivers/gpu/nvgpu/common/pmu/clk/clk_domain.c
View File

@@ -45,8 +45,8 @@ static struct nvgpu_clk_domain *construct_clk_domain(struct gk20a *g,
static int devinit_get_clocks_table(struct gk20a *g,
struct nvgpu_clk_domains *pclkdomainobjs);
static int clk_domain_pmudatainit_super(struct gk20a *g, struct boardobj
*board_obj_ptr, struct nv_pmu_boardobj *ppmudata);
static int clk_domain_pmudatainit_super(struct gk20a *g, struct pmu_board_obj
*obj, struct nv_pmu_boardobj *pmu_obj);
struct vbios_clocks_table_1x_hal_clock_entry {
u32 domain;
@@ -192,7 +192,7 @@ done:
static int _clk_domains_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx)
struct nv_pmu_boardobj **pmu_obj, u8 idx)
{
struct nv_pmu_clk_clk_domain_boardobj_grp_set *pgrp_set =
(struct nv_pmu_clk_clk_domain_boardobj_grp_set *)(void *)
@@ -206,8 +206,8 @@ static int _clk_domains_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.board_obj;
*pmu_obj = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.obj;
nvgpu_log_info(g, " Done");
return 0;
}
@@ -400,7 +400,7 @@ static int devinit_get_clocks_table_35(struct gk20a *g,
bool done = false;
struct nvgpu_clk_domain *pclkdomain_dev;
union {
struct boardobj board_obj;
struct pmu_board_obj obj;
struct nvgpu_clk_domain clk_domain;
struct clk_domain_3x v3x;
struct clk_domain_3x_fixed v3x_fixed;
@@ -462,7 +462,7 @@ static int devinit_get_clocks_table_35(struct gk20a *g,
NV_VBIOS_CLOCKS_TABLE_1X_ENTRY_FLAGS0_USAGE)) {
case NV_VBIOS_CLOCKS_TABLE_1X_ENTRY_FLAGS0_USAGE_FIXED:
{
clk_domain_data.board_obj.type =
clk_domain_data.obj.type =
CTRL_CLK_CLK_DOMAIN_TYPE_3X_FIXED;
clk_domain_data.v3x_fixed.freq_mhz = BIOS_GET_FIELD(u16,
clocks_table_entry.param1,
@@ -472,7 +472,7 @@ static int devinit_get_clocks_table_35(struct gk20a *g,
case NV_VBIOS_CLOCKS_TABLE_1X_ENTRY_FLAGS0_USAGE_MASTER:
{
clk_domain_data.board_obj.type =
clk_domain_data.obj.type =
CTRL_CLK_CLK_DOMAIN_TYPE_35_MASTER;
clk_domain_data.v35_prog.super.clk_prog_idx_first =
BIOS_GET_FIELD(u8, clocks_table_entry.param0,
@@ -526,7 +526,7 @@ static int devinit_get_clocks_table_35(struct gk20a *g,
case NV_VBIOS_CLOCKS_TABLE_1X_ENTRY_FLAGS0_USAGE_SLAVE:
{
clk_domain_data.board_obj.type =
clk_domain_data.obj.type =
CTRL_CLK_CLK_DOMAIN_TYPE_35_SLAVE;
clk_domain_data.v35_prog.super.clk_prog_idx_first =
BIOS_GET_FIELD(u8, clocks_table_entry.param0,
@@ -605,7 +605,7 @@ static int devinit_get_clocks_table_35(struct gk20a *g,
goto done;
}
status = boardobjgrp_objinsert(&pclkdomainobjs->super.super,
(struct boardobj *)(void *)
(struct pmu_board_obj *)(void *)
pclkdomain_dev, index);
if (status != 0) {
nvgpu_err(g,
@@ -648,7 +648,7 @@ done:
}
static int clk_domain_construct_super(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct nvgpu_clk_domain *pdomain;
@@ -660,14 +660,13 @@ static int clk_domain_construct_super(struct gk20a *g,
return -ENOMEM;
}
status = pmu_boardobj_construct_super(g,
(struct boardobj *)(void *)pdomain, pargs);
status = pmu_board_obj_construct_super(g,
(struct pmu_board_obj *)(void *)pdomain, pargs);
if (status != 0) {
return -EINVAL;
}
*ppboardobj = (struct boardobj *)(void *)pdomain;
*obj = (struct pmu_board_obj *)(void *)pdomain;
pdomain->super.pmudatainit =
clk_domain_pmudatainit_super;
@@ -681,8 +680,8 @@ static int clk_domain_construct_super(struct gk20a *g,
}
static int _clk_domain_pmudatainit_3x(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct clk_domain_3x *pclk_domain_3x;
@@ -690,14 +689,14 @@ static int _clk_domain_pmudatainit_3x(struct gk20a *g,
nvgpu_log_info(g, " ");
status = clk_domain_pmudatainit_super(g, board_obj_ptr, ppmudata);
status = clk_domain_pmudatainit_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pclk_domain_3x = (struct clk_domain_3x *)(void *)board_obj_ptr;
pclk_domain_3x = (struct clk_domain_3x *)(void *)obj;
pset = (struct nv_pmu_clk_clk_domain_3x_boardobj_set *)(void *)ppmudata;
pset = (struct nv_pmu_clk_clk_domain_3x_boardobj_set *)(void *)pmu_obj;
pset->b_noise_aware_capable = pclk_domain_3x->b_noise_aware_capable;
@@ -705,23 +704,23 @@ static int _clk_domain_pmudatainit_3x(struct gk20a *g,
}
static int clk_domain_construct_3x(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct clk_domain_3x *pdomain;
struct clk_domain_3x *ptmpdomain =
(struct clk_domain_3x *)pargs;
int status = 0;
ptmpobj->type_mask = BIT32(CTRL_CLK_CLK_DOMAIN_TYPE_3X);
status = clk_domain_construct_super(g, ppboardobj,
obj_tmp->type_mask = BIT32(CTRL_CLK_CLK_DOMAIN_TYPE_3X);
status = clk_domain_construct_super(g, obj,
size, pargs);
if (status != 0) {
return -EINVAL;
}
pdomain = (struct clk_domain_3x *)(void *)*ppboardobj;
pdomain = (struct clk_domain_3x *)(void *)*obj;
pdomain->super.super.pmudatainit =
_clk_domain_pmudatainit_3x;
@@ -773,7 +772,7 @@ static int clkdomaingetslaveclk(struct gk20a *g,
if (masterclkmhz == 0U) {
return -EINVAL;
}
slaveidx = BOARDOBJ_GET_IDX(pdomain);
slaveidx = pmu_board_obj_get_idx(pdomain);
p35master = (struct clk_domain_35_master *)(void *)
clk_get_clk_domain_from_index(pclk,
((struct clk_domain_35_slave *)
@@ -823,7 +822,7 @@ static int clkdomainvfsearch(struct gk20a *g,
if (pdomain->super.implements(g, &pdomain->super,
CTRL_CLK_CLK_DOMAIN_TYPE_3X_SLAVE)) {
slaveidx = BOARDOBJ_GET_IDX(pdomain);
slaveidx = pmu_board_obj_get_idx(pdomain);
pslaveidx = &slaveidx;
p3xmaster = (struct clk_domain_3x_master *)(void *)
clk_get_clk_domain_from_index(pclk,
@@ -945,8 +944,8 @@ done:
}
static int clk_domain_pmudatainit_35_prog(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct clk_domain_35_prog *pclk_domain_35_prog;
@@ -956,16 +955,16 @@ static int clk_domain_pmudatainit_35_prog(struct gk20a *g,
nvgpu_log_info(g, " ");
status = _clk_domain_pmudatainit_3x(g, board_obj_ptr, ppmudata);
status = _clk_domain_pmudatainit_3x(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pclk_domain_35_prog = (struct clk_domain_35_prog *)(void*)board_obj_ptr;
pclk_domain_35_prog = (struct clk_domain_35_prog *)(void *)obj;
pclk_domain_3x_prog = &pclk_domain_35_prog->super;
pset = (struct nv_pmu_clk_clk_domain_35_prog_boardobj_set *)
(void*) ppmudata;
(void *)pmu_obj;
pset->super.clk_prog_idx_first =
pclk_domain_3x_prog->clk_prog_idx_first;
@@ -998,23 +997,23 @@ static int clk_domain_pmudatainit_35_prog(struct gk20a *g,
}
static int clk_domain_construct_35_prog(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct clk_domain_35_prog *pdomain;
struct clk_domain_35_prog *ptmpdomain =
(struct clk_domain_35_prog *)pargs;
int status = 0;
ptmpobj->type_mask |= BIT32(CTRL_CLK_CLK_DOMAIN_TYPE_35_PROG);
status = clk_domain_construct_3x(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= BIT32(CTRL_CLK_CLK_DOMAIN_TYPE_35_PROG);
status = clk_domain_construct_3x(g, obj, size, pargs);
if (status != 0)
{
return -EINVAL;
}
pdomain = (struct clk_domain_35_prog *)(void*) *ppboardobj;
pdomain = (struct clk_domain_35_prog *)(void *) *obj;
pdomain->super.super.super.super.type_mask |=
BIT32(CTRL_CLK_CLK_DOMAIN_TYPE_35_PROG);
@@ -1059,8 +1058,8 @@ static int clk_domain_construct_35_prog(struct gk20a *g,
}
static int _clk_domain_pmudatainit_35_slave(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct clk_domain_35_slave *pclk_domain_35_slave;
@@ -1068,16 +1067,16 @@ static int _clk_domain_pmudatainit_35_slave(struct gk20a *g,
nvgpu_log_info(g, " ");
status = clk_domain_pmudatainit_35_prog(g, board_obj_ptr, ppmudata);
status = clk_domain_pmudatainit_35_prog(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pclk_domain_35_slave = (struct clk_domain_35_slave *)
(void *)board_obj_ptr;
(void *)obj;
pset = (struct nv_pmu_clk_clk_domain_35_slave_boardobj_set *)
(void*) ppmudata;
(void *)pmu_obj;
pset->slave.master_idx = pclk_domain_35_slave->slave.master_idx;
@@ -1085,27 +1084,27 @@ static int _clk_domain_pmudatainit_35_slave(struct gk20a *g,
}
static int clk_domain_construct_35_slave(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct clk_domain_35_slave *pdomain;
struct clk_domain_35_slave *ptmpdomain =
(struct clk_domain_35_slave *)pargs;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) !=
if (pmu_board_obj_get_type(pargs) !=
(u8) CTRL_CLK_CLK_DOMAIN_TYPE_35_SLAVE) {
return -EINVAL;
}
ptmpobj->type_mask |= BIT32(CTRL_CLK_CLK_DOMAIN_TYPE_35_SLAVE);
status = clk_domain_construct_35_prog(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= BIT32(CTRL_CLK_CLK_DOMAIN_TYPE_35_SLAVE);
status = clk_domain_construct_35_prog(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pdomain = (struct clk_domain_35_slave *)(void*)*ppboardobj;
pdomain = (struct clk_domain_35_slave *)(void *)*obj;
pdomain->super.super.super.super.super.pmudatainit =
_clk_domain_pmudatainit_35_slave;
@@ -1152,7 +1151,7 @@ static int clkdomainclkproglink_3x_master(struct gk20a *g,
pprog1xmaster = (struct clk_prog_1x_master *)(void *)pprog;
status = pprog1xmaster->vfflatten(g, pclk, pprog1xmaster,
BOARDOBJ_GET_IDX(p3xmaster), &freq_max_last_mhz);
pmu_board_obj_get_idx(p3xmaster), &freq_max_last_mhz);
if (status != 0) {
goto done;
}
@@ -1163,8 +1162,8 @@ done:
}
static int clk_domain_pmudatainit_35_master(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct clk_domain_35_master *pclk_domain_35_master;
@@ -1172,16 +1171,16 @@ static int clk_domain_pmudatainit_35_master(struct gk20a *g,
nvgpu_log_info(g, " ");
status = clk_domain_pmudatainit_35_prog(g, board_obj_ptr, ppmudata);
status = clk_domain_pmudatainit_35_prog(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pclk_domain_35_master = (struct clk_domain_35_master *)
(void*) board_obj_ptr;
(void *)obj;
pset = (struct nv_pmu_clk_clk_domain_35_master_boardobj_set *)
(void*) ppmudata;
(void *)pmu_obj;
pset->master.slave_idxs_mask =
pclk_domain_35_master->master.slave_idxs_mask;
@@ -1196,25 +1195,25 @@ static int clk_domain_pmudatainit_35_master(struct gk20a *g,
}
static int clk_domain_construct_35_master(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct clk_domain_35_master *pdomain;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) !=
if (pmu_board_obj_get_type(pargs) !=
(u8) CTRL_CLK_CLK_DOMAIN_TYPE_35_MASTER) {
return -EINVAL;
}
ptmpobj->type_mask |= BIT32(CTRL_CLK_CLK_DOMAIN_TYPE_35_MASTER);
status = clk_domain_construct_35_prog(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= BIT32(CTRL_CLK_CLK_DOMAIN_TYPE_35_MASTER);
status = clk_domain_construct_35_prog(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pdomain = (struct clk_domain_35_master *)(void*) *ppboardobj;
pdomain = (struct clk_domain_35_master *)(void *) *obj;
pdomain->super.super.super.super.super.pmudatainit =
clk_domain_pmudatainit_35_master;
@@ -1239,8 +1238,8 @@ static int clkdomainclkproglink_fixed(struct gk20a *g,
}
static int _clk_domain_pmudatainit_3x_fixed(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct clk_domain_3x_fixed *pclk_domain_3x_fixed;
@@ -1248,16 +1247,16 @@ static int _clk_domain_pmudatainit_3x_fixed(struct gk20a *g,
nvgpu_log_info(g, " ");
status = _clk_domain_pmudatainit_3x(g, board_obj_ptr, ppmudata);
status = _clk_domain_pmudatainit_3x(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pclk_domain_3x_fixed = (struct clk_domain_3x_fixed *)
(void *)board_obj_ptr;
(void *)obj;
pset = (struct nv_pmu_clk_clk_domain_3x_fixed_boardobj_set *)
(void *)ppmudata;
(void *)pmu_obj;
pset->freq_mhz = pclk_domain_3x_fixed->freq_mhz;
@@ -1265,26 +1264,26 @@ static int _clk_domain_pmudatainit_3x_fixed(struct gk20a *g,
}
static int clk_domain_construct_3x_fixed(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct clk_domain_3x_fixed *pdomain;
struct clk_domain_3x_fixed *ptmpdomain =
(struct clk_domain_3x_fixed *)pargs;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_FIXED) {
if (pmu_board_obj_get_type(pargs) != CTRL_CLK_CLK_DOMAIN_TYPE_3X_FIXED) {
return -EINVAL;
}
ptmpobj->type_mask |= BIT32(CTRL_CLK_CLK_DOMAIN_TYPE_3X_FIXED);
status = clk_domain_construct_3x(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= BIT32(CTRL_CLK_CLK_DOMAIN_TYPE_3X_FIXED);
status = clk_domain_construct_3x(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pdomain = (struct clk_domain_3x_fixed *)(void *)*ppboardobj;
pdomain = (struct clk_domain_3x_fixed *)(void *)*obj;
pdomain->super.super.super.pmudatainit =
_clk_domain_pmudatainit_3x_fixed;
@@ -1300,23 +1299,23 @@ static int clk_domain_construct_3x_fixed(struct gk20a *g,
static struct nvgpu_clk_domain *construct_clk_domain(struct gk20a *g,
void *pargs)
{
struct boardobj *board_obj_ptr = NULL;
struct pmu_board_obj *obj = NULL;
int status;
nvgpu_log_info(g, " %d", (BOARDOBJ_GET_TYPE(pargs)));
switch (BOARDOBJ_GET_TYPE(pargs)) {
nvgpu_log_info(g, " %d", (pmu_board_obj_get_type(pargs)));
switch (pmu_board_obj_get_type(pargs)) {
case CTRL_CLK_CLK_DOMAIN_TYPE_3X_FIXED:
status = clk_domain_construct_3x_fixed(g, &board_obj_ptr,
status = clk_domain_construct_3x_fixed(g, &obj,
sizeof(struct clk_domain_3x_fixed), pargs);
break;
case CTRL_CLK_CLK_DOMAIN_TYPE_35_MASTER:
status = clk_domain_construct_35_master(g, &board_obj_ptr,
status = clk_domain_construct_35_master(g, &obj,
sizeof(struct clk_domain_35_master), pargs);
break;
case CTRL_CLK_CLK_DOMAIN_TYPE_35_SLAVE:
status = clk_domain_construct_35_slave(g, &board_obj_ptr,
status = clk_domain_construct_35_slave(g, &obj,
sizeof(struct clk_domain_35_slave), pargs);
break;
@@ -1332,12 +1331,12 @@ static struct nvgpu_clk_domain *construct_clk_domain(struct gk20a *g,
nvgpu_log_info(g, " Done");
return (struct nvgpu_clk_domain *)(void *)board_obj_ptr;
return (struct nvgpu_clk_domain *)(void *)obj;
}
static int clk_domain_pmudatainit_super(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct nvgpu_clk_domain *pclk_domain;
@@ -1345,14 +1344,14 @@ static int clk_domain_pmudatainit_super(struct gk20a *g,
nvgpu_log_info(g, " ");
status = nvgpu_boardobj_pmu_data_init_super(g, board_obj_ptr, ppmudata);
status = pmu_board_obj_pmu_data_init_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pclk_domain = (struct nvgpu_clk_domain *)(void *)board_obj_ptr;
pclk_domain = (struct nvgpu_clk_domain *)(void *)obj;
pset = (struct nv_pmu_clk_clk_domain_boardobj_set *)(void *)ppmudata;
pset = (struct nv_pmu_clk_clk_domain_boardobj_set *)(void *)pmu_obj;
pset->domain = pclk_domain->domain;
pset->api_domain = pclk_domain->api_domain;
@@ -1726,7 +1725,7 @@ int nvgpu_pmu_clk_domain_freq_to_volt(struct gk20a *g, u8 clkdomain_idx,
struct nvgpu_clk_vf_points *pclk_vf_points;
struct boardobjgrp *pboardobjgrp;
struct boardobj *pboardobj = NULL;
struct pmu_board_obj *obj = NULL;
int status = -EINVAL;
struct clk_vf_point *pclk_vf_point;
u8 index;
@@ -1735,9 +1734,9 @@ int nvgpu_pmu_clk_domain_freq_to_volt(struct gk20a *g, u8 clkdomain_idx,
pclk_vf_points = g->pmu->clk_pmu->clk_vf_pointobjs;
pboardobjgrp = &pclk_vf_points->super.super;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) {
pclk_vf_point = (struct clk_vf_point *)(void *)pboardobj;
if ((*pclkmhz) <= pclk_vf_point->pair.freq_mhz) {
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct pmu_board_obj*, obj, index) {
pclk_vf_point = (struct clk_vf_point *)(void *)obj;
if((*pclkmhz) <= pclk_vf_point->pair.freq_mhz) {
*pvoltuv = pclk_vf_point->pair.voltage_uv;
return 0;
}

3
drivers/gpu/nvgpu/common/pmu/clk/clk_domain.h
View File

@@ -24,6 +24,7 @@
#define NVGPU_CLK_DOMAIN_H
#include <nvgpu/pmu/pmuif/nvgpu_cmdif.h>
#include <common/pmu/boardobj/boardobj.h>
#define CLK_DOMAIN_BOARDOBJGRP_VERSION 0x30
#define CLK_DOMAIN_BOARDOBJGRP_VERSION_35 0x35
@@ -45,7 +46,7 @@ typedef int nvgpu_clkgetfpoints(struct gk20a *g,
u32 *pfpointscount, u16 *pfreqpointsinmhz, u8 rail);
struct nvgpu_clk_domain {
struct boardobj super;
struct pmu_board_obj super;
u32 api_domain;
u32 part_mask;
u32 domain;

44
drivers/gpu/nvgpu/common/pmu/clk/clk_fll.c
View File

@@ -42,8 +42,8 @@ static int devinit_get_fll_device_table(struct gk20a *g,
static struct fll_device *construct_fll_device(struct gk20a *g,
void *pargs);
static int fll_device_init_pmudata_super(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata);
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj);
static u32 clk_get_vbios_clk_domain(u32 vbios_domain);
@@ -96,7 +96,7 @@ static int _clk_fll_devgrp_pmudatainit_super(struct gk20a *g,
static int _clk_fll_devgrp_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx)
struct nv_pmu_boardobj **pmu_obj, u8 idx)
{
struct nv_pmu_clk_clk_fll_device_boardobj_grp_set *pgrp_set =
(struct nv_pmu_clk_clk_fll_device_boardobj_grp_set *)
@@ -110,15 +110,15 @@ static int _clk_fll_devgrp_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.board_obj;
*pmu_obj = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.obj;
nvgpu_log_info(g, " Done");
return 0;
}
static int _clk_fll_devgrp_pmustatus_instget(struct gk20a *g,
void *pboardobjgrppmu,
struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx)
struct nv_pmu_boardobj_query **obj_pmu_status, u8 idx)
{
struct nv_pmu_clk_clk_fll_device_boardobj_grp_get_status
*pgrp_get_status =
@@ -131,8 +131,8 @@ static int _clk_fll_devgrp_pmustatus_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmustatus = (struct nv_pmu_boardobj_query *)
&pgrp_get_status->objects[idx].data.board_obj;
*obj_pmu_status = (struct nv_pmu_boardobj_query *)
&pgrp_get_status->objects[idx].data.obj;
return 0;
}
@@ -217,7 +217,7 @@ int clk_fll_sw_setup(struct gk20a *g)
if (pfll_master == NULL) {
status = nvgpu_boardobjgrpmask_bit_set(
&pfllobjs->lut_prog_master_mask.super,
BOARDOBJ_GET_IDX(pfll));
pmu_board_obj_get_idx(pfll));
if (status != 0) {
nvgpu_err(g, "err setting lutprogmask");
goto done;
@@ -400,7 +400,7 @@ static int devinit_get_fll_device_table(struct gk20a *g,
pfll_dev = construct_fll_device(g, (void *)&fll_dev_data);
status = boardobjgrp_objinsert(&pfllobjs->super.super,
(struct boardobj *)pfll_dev, index);
(struct pmu_board_obj *)pfll_dev, index);
fll_tbl_entry_ptr += fll_desc_table_header.entry_size;
}
@@ -436,13 +436,13 @@ static int lutbroadcastslaveregister(struct gk20a *g,
return nvgpu_boardobjgrpmask_bit_set(&pfll->
lut_prog_broadcast_slave_mask.super,
BOARDOBJ_GET_IDX(pfll_slave));
pmu_board_obj_get_idx(pfll_slave));
}
static struct fll_device *construct_fll_device(struct gk20a *g,
void *pargs)
{
struct boardobj *board_obj_ptr = NULL;
struct pmu_board_obj *obj = NULL;
struct fll_device *pfll_dev;
struct fll_device *board_obj_fll_ptr = NULL;
int status;
@@ -453,15 +453,15 @@ static struct fll_device *construct_fll_device(struct gk20a *g,
if (board_obj_fll_ptr == NULL) {
return NULL;
}
board_obj_ptr = (struct boardobj *)(void *)board_obj_fll_ptr;
obj = (struct pmu_board_obj *)(void *)board_obj_fll_ptr;
status = pmu_boardobj_construct_super(g, board_obj_ptr, pargs);
status = pmu_board_obj_construct_super(g, obj, pargs);
if (status != 0) {
return NULL;
}
pfll_dev = (struct fll_device *)pargs;
board_obj_ptr->pmudatainit = fll_device_init_pmudata_super;
obj->pmudatainit = fll_device_init_pmudata_super;
board_obj_fll_ptr->lut_broadcast_slave_register =
lutbroadcastslaveregister;
board_obj_fll_ptr->id = pfll_dev->id;
@@ -488,7 +488,7 @@ static struct fll_device *construct_fll_device(struct gk20a *g,
&board_obj_fll_ptr->lut_prog_broadcast_slave_mask, NULL);
if (status != 0) {
nvgpu_err(g, "boardobjgrpmask_e32_init failed err=%d", status);
status = board_obj_ptr->destruct(board_obj_ptr);
status = obj->destruct(obj);
if (status != 0) {
nvgpu_err(g, "destruct failed err=%d", status);
}
@@ -497,12 +497,12 @@ static struct fll_device *construct_fll_device(struct gk20a *g,
nvgpu_log_info(g, " Done");
return (struct fll_device *)board_obj_ptr;
return (struct fll_device *)(void *)obj;
}
static int fll_device_init_pmudata_super(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct fll_device *pfll_dev;
@@ -510,14 +510,14 @@ static int fll_device_init_pmudata_super(struct gk20a *g,
nvgpu_log_info(g, " ");
status = nvgpu_boardobj_pmu_data_init_super(g, board_obj_ptr, ppmudata);
status = pmu_board_obj_pmu_data_init_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pfll_dev = (struct fll_device *)board_obj_ptr;
pfll_dev = (struct fll_device *)(void *)obj;
perf_pmu_data = (struct nv_pmu_clk_clk_fll_device_boardobj_set *)
ppmudata;
pmu_obj;
perf_pmu_data->id = pfll_dev->id;
perf_pmu_data->mdiv = pfll_dev->mdiv;

2
drivers/gpu/nvgpu/common/pmu/clk/clk_fll.h
View File

@@ -43,7 +43,7 @@ typedef int fll_lut_broadcast_slave_register(struct gk20a *g,
struct fll_device *pfll_slave);
struct fll_device {
struct boardobj super;
struct pmu_board_obj super;
u8 id;
u8 mdiv;
u16 input_freq_mhz;

176
drivers/gpu/nvgpu/common/pmu/clk/clk_prog.c
View File

@@ -88,7 +88,7 @@ done:
static int _clk_progs_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata,
struct nv_pmu_boardobj **pmu_obj,
u8 idx)
{
struct nv_pmu_clk_clk_prog_boardobj_grp_set *pgrp_set =
@@ -103,8 +103,8 @@ static int _clk_progs_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.board_obj;
*pmu_obj = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.obj;
nvgpu_log_info(g, " Done");
return 0;
}
@@ -213,7 +213,7 @@ static int devinit_get_clk_prog_table_35(struct gk20a *g,
tableslaveentries[CTRL_CLK_PROG_1X_MASTER_MAX_SLAVE_ENTRIES];
struct ctrl_clk_clk_prog_1x_source_pll *source_pll;
union {
struct boardobj board_obj;
struct pmu_board_obj obj;
struct clk_prog clkprog;
struct clk_prog_1x v1x;
struct clk_prog_35_master v35_master;
@@ -404,11 +404,11 @@ static int devinit_get_clk_prog_table_35(struct gk20a *g,
}
if (prog_type == NV_VBIOS_CLOCK_PROGRAMMING_TABLE_1X_ENTRY_FLAGS0_TYPE_MASTER_RATIO) {
prog_data.board_obj.type = CTRL_CLK_CLK_PROG_TYPE_35_MASTER_RATIO;
prog_data.obj.type = CTRL_CLK_CLK_PROG_TYPE_35_MASTER_RATIO;
prog_data.v35_master_ratio.ratio.p_slave_entries =
ratioslaveentries;
} else {
prog_data.board_obj.type = CTRL_CLK_CLK_PROG_TYPE_35_MASTER_TABLE;
prog_data.obj.type = CTRL_CLK_CLK_PROG_TYPE_35_MASTER_TABLE;
prog_data.v35_master_table.table.p_slave_entries =
tableslaveentries;
@@ -416,7 +416,7 @@ static int devinit_get_clk_prog_table_35(struct gk20a *g,
break;
case NV_VBIOS_CLOCK_PROGRAMMING_TABLE_1X_ENTRY_FLAGS0_TYPE_SLAVE:
prog_data.board_obj.type = CTRL_CLK_CLK_PROG_TYPE_35;
prog_data.obj.type = CTRL_CLK_CLK_PROG_TYPE_35;
break;
default:
@@ -437,7 +437,7 @@ static int devinit_get_clk_prog_table_35(struct gk20a *g,
}
status = boardobjgrp_objinsert(&pclkprogobjs->super.super,
(struct boardobj *)(void *)pprog, i);
(struct pmu_board_obj *)(void *)pprog, i);
if (status != 0) {
nvgpu_err(g, "error adding clk_prog boardobj %d", i);
status = -EINVAL;
@@ -479,20 +479,20 @@ static int devinit_get_clk_prog_table(struct gk20a *g,
}
static int clk_prog_pmudatainit_super(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
nvgpu_log_info(g, " ");
status = nvgpu_boardobj_pmu_data_init_super(g, board_obj_ptr, ppmudata);
status = pmu_board_obj_pmu_data_init_super(g, obj, pmu_obj);
return status;
}
static int clk_prog_pmudatainit_1x(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct clk_prog_1x *pclk_prog_1x;
@@ -500,15 +500,15 @@ static int clk_prog_pmudatainit_1x(struct gk20a *g,
nvgpu_log_info(g, " ");
status = clk_prog_pmudatainit_super(g, board_obj_ptr, ppmudata);
status = clk_prog_pmudatainit_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pclk_prog_1x = (struct clk_prog_1x *)(void *)board_obj_ptr;
pclk_prog_1x = (struct clk_prog_1x *)(void *)obj;
pset = (struct nv_pmu_clk_clk_prog_1x_boardobj_set *)(void *)
ppmudata;
pmu_obj;
pset->source = pclk_prog_1x->source;
pset->freq_max_mhz = pclk_prog_1x->freq_max_mhz;
@@ -518,8 +518,8 @@ static int clk_prog_pmudatainit_1x(struct gk20a *g,
}
static int clk_prog_pmudatainit_1x_master(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct clk_prog_1x_master *pclk_prog_1x_master;
@@ -529,13 +529,13 @@ static int clk_prog_pmudatainit_1x_master(struct gk20a *g,
nvgpu_log_info(g, " ");
status = clk_prog_pmudatainit_1x(g, board_obj_ptr, ppmudata);
status = clk_prog_pmudatainit_1x(g, obj, pmu_obj);
pclk_prog_1x_master =
(struct clk_prog_1x_master *)(void *)board_obj_ptr;
(struct clk_prog_1x_master *)(void *)obj;
pset = (struct nv_pmu_clk_clk_prog_1x_master_boardobj_set *)(void *)
ppmudata;
pmu_obj;
nvgpu_memcpy((u8 *)pset->vf_entries,
(u8 *)pclk_prog_1x_master->p_vf_entries, vfsize);
@@ -550,8 +550,8 @@ static int clk_prog_pmudatainit_1x_master(struct gk20a *g,
}
static int clk_prog_pmudatainit_35_master(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct clk_prog_35_master *pclk_prog_35_master;
@@ -562,13 +562,13 @@ static int clk_prog_pmudatainit_35_master(struct gk20a *g,
nvgpu_log_info(g, " ");
status = clk_prog_pmudatainit_1x_master(g, board_obj_ptr, ppmudata);
status = clk_prog_pmudatainit_1x_master(g, obj, pmu_obj);
pclk_prog_35_master =
(struct clk_prog_35_master *)(void *)board_obj_ptr;
(struct clk_prog_35_master *)(void *)obj;
pset = (struct nv_pmu_clk_clk_prog_35_master_boardobj_set *)(void *)
ppmudata;
pmu_obj;
nvgpu_memcpy((u8 *)pset->voltrail_sec_vf_entries,
(u8 *)pclk_prog_35_master->p_voltrail_sec_vf_entries,
@@ -578,8 +578,8 @@ static int clk_prog_pmudatainit_35_master(struct gk20a *g,
}
static int clk_prog_pmudatainit_35_master_ratio(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct clk_prog_35_master_ratio *pclk_prog_35_master_ratio;
@@ -589,16 +589,16 @@ static int clk_prog_pmudatainit_35_master_ratio(struct gk20a *g,
nvgpu_log_info(g, " ");
status = clk_prog_pmudatainit_35_master(g, board_obj_ptr, ppmudata);
status = clk_prog_pmudatainit_35_master(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pclk_prog_35_master_ratio =
(struct clk_prog_35_master_ratio *)(void *)board_obj_ptr;
(struct clk_prog_35_master_ratio *)(void *)obj;
pset = (struct nv_pmu_clk_clk_prog_35_master_ratio_boardobj_set *)
(void *)ppmudata;
(void *)pmu_obj;
nvgpu_memcpy((u8 *)pset->ratio.slave_entries,
(u8 *)pclk_prog_35_master_ratio->ratio.p_slave_entries,
@@ -608,8 +608,8 @@ static int clk_prog_pmudatainit_35_master_ratio(struct gk20a *g,
}
static int clk_prog_pmudatainit_35_master_table(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct clk_prog_35_master_table *pclk_prog_35_master_table;
@@ -620,16 +620,16 @@ static int clk_prog_pmudatainit_35_master_table(struct gk20a *g,
nvgpu_log_info(g, " ");
status = clk_prog_pmudatainit_35_master(g, board_obj_ptr, ppmudata);
status = clk_prog_pmudatainit_35_master(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pclk_prog_35_master_table =
(struct clk_prog_35_master_table *)(void *)board_obj_ptr;
(struct clk_prog_35_master_table *)(void *)obj;
pset = (struct nv_pmu_clk_clk_prog_35_master_table_boardobj_set *)
(void *)ppmudata;
(void *)pmu_obj;
nvgpu_memcpy((u8 *)pset->table.slave_entries,
(u8 *)pclk_prog_35_master_table->table.p_slave_entries,
slavesize);
@@ -669,7 +669,7 @@ done:
}
static int clk_prog_construct_super(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pargs)
struct pmu_board_obj **obj, size_t size, void *pargs)
{
struct clk_prog *pclkprog;
int status = 0;
@@ -679,13 +679,13 @@ static int clk_prog_construct_super(struct gk20a *g,
return -ENOMEM;
}
status = pmu_boardobj_construct_super(g,
(struct boardobj *)(void *)pclkprog, pargs);
status = pmu_board_obj_construct_super(g,
(struct pmu_board_obj *)(void *)pclkprog, pargs);
if (status != 0) {
return -EINVAL;
}
*ppboardobj = (struct boardobj *)(void *)pclkprog;
*obj = (struct pmu_board_obj *)(void *)pclkprog;
pclkprog->super.pmudatainit =
clk_prog_pmudatainit_super;
@@ -693,23 +693,23 @@ static int clk_prog_construct_super(struct gk20a *g,
}
static int clk_prog_construct_1x(struct gk20a *g, struct boardobj **ppboardobj,
static int clk_prog_construct_1x(struct gk20a *g, struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct clk_prog_1x *pclkprog;
struct clk_prog_1x *ptmpprog =
(struct clk_prog_1x *)pargs;
int status = 0;
nvgpu_log_info(g, " ");
ptmpobj->type_mask |= (u32)BIT(CTRL_CLK_CLK_PROG_TYPE_1X);
status = clk_prog_construct_super(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_CLK_CLK_PROG_TYPE_1X);
status = clk_prog_construct_super(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pclkprog = (struct clk_prog_1x *)(void *)*ppboardobj;
pclkprog = (struct clk_prog_1x *)(void *)*obj;
pclkprog->super.super.pmudatainit =
clk_prog_pmudatainit_1x;
@@ -721,23 +721,23 @@ static int clk_prog_construct_1x(struct gk20a *g, struct boardobj **ppboardobj,
return status;
}
static int clk_prog_construct_35(struct gk20a *g, struct boardobj **ppboardobj,
static int clk_prog_construct_35(struct gk20a *g, struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct clk_prog_1x *pclkprog;
struct clk_prog_1x *ptmpprog =
(struct clk_prog_1x *)pargs;
int status = 0;
nvgpu_log_info(g, " ");
ptmpobj->type_mask |= (u32)BIT(CTRL_CLK_CLK_PROG_TYPE_35);
status = clk_prog_construct_super(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_CLK_CLK_PROG_TYPE_35);
status = clk_prog_construct_super(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pclkprog = (struct clk_prog_1x *)(void *)*ppboardobj;
pclkprog = (struct clk_prog_1x *)(void *)*obj;
pclkprog->super.super.pmudatainit =
clk_prog_pmudatainit_1x;
@@ -750,9 +750,9 @@ static int clk_prog_construct_35(struct gk20a *g, struct boardobj **ppboardobj,
}
static int clk_prog_construct_1x_master(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pargs)
struct pmu_board_obj **obj, size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct clk_prog_1x_master *pclkprog;
struct clk_prog_1x_master *ptmpprog =
(struct clk_prog_1x_master *)pargs;
@@ -761,15 +761,15 @@ static int clk_prog_construct_1x_master(struct gk20a *g,
g->pmu->clk_pmu->clk_progobjs->vf_entry_count;
u8 railidx;
nvgpu_log_info(g, " type - %x", BOARDOBJ_GET_TYPE(pargs));
nvgpu_log_info(g, " type - %x", pmu_board_obj_get_type(pargs));
ptmpobj->type_mask |= (u32)BIT(CTRL_CLK_CLK_PROG_TYPE_1X_MASTER);
status = clk_prog_construct_1x(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_CLK_CLK_PROG_TYPE_1X_MASTER);
status = clk_prog_construct_1x(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pclkprog = (struct clk_prog_1x_master *)(void *)*ppboardobj;
pclkprog = (struct clk_prog_1x_master *)(void *)*obj;
pclkprog->super.super.super.pmudatainit =
clk_prog_pmudatainit_1x_master;
@@ -807,9 +807,9 @@ static int clk_prog_construct_1x_master(struct gk20a *g,
}
static int clk_prog_construct_35_master(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pargs)
struct pmu_board_obj **obj, size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct clk_prog_35_master *pclkprog;
struct clk_prog_35_master *ptmpprog =
(struct clk_prog_35_master *)pargs;
@@ -818,15 +818,15 @@ static int clk_prog_construct_35_master(struct gk20a *g,
sizeof(struct ctrl_clk_clk_prog_35_master_sec_vf_entry_voltrail)
* CTRL_CLK_CLK_PROG_1X_MASTER_VF_ENTRY_MAX_ENTRIES;
nvgpu_log_info(g, " type - %x", BOARDOBJ_GET_TYPE(pargs));
nvgpu_log_info(g, " type - %x", pmu_board_obj_get_type(pargs));
ptmpobj->type_mask |= (u32)BIT(CTRL_CLK_CLK_PROG_TYPE_35_MASTER);
status = clk_prog_construct_1x_master(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_CLK_CLK_PROG_TYPE_35_MASTER);
status = clk_prog_construct_1x_master(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pclkprog = (struct clk_prog_35_master *)(void *)*ppboardobj;
pclkprog = (struct clk_prog_35_master *)(void *)*obj;
pclkprog->super.super.super.pmudatainit =
clk_prog_pmudatainit_35_master;
@@ -848,9 +848,9 @@ static int clk_prog_construct_35_master(struct gk20a *g,
}
static int clk_prog_construct_35_master_ratio(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pargs)
struct pmu_board_obj **obj, size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct clk_prog_35_master_ratio *pclkprog;
struct clk_prog_35_master_ratio *ptmpprog =
(struct clk_prog_35_master_ratio *)pargs;
@@ -859,17 +859,17 @@ static int clk_prog_construct_35_master_ratio(struct gk20a *g,
struct ctrl_clk_clk_prog_1x_master_ratio_slave_entry) *
g->pmu->clk_pmu->clk_progobjs->slave_entry_count;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_PROG_TYPE_35_MASTER_RATIO) {
if (pmu_board_obj_get_type(pargs) != CTRL_CLK_CLK_PROG_TYPE_35_MASTER_RATIO) {
return -EINVAL;
}
ptmpobj->type_mask |= (u32)BIT(CTRL_CLK_CLK_PROG_TYPE_35_MASTER_RATIO);
status = clk_prog_construct_35_master(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_CLK_CLK_PROG_TYPE_35_MASTER_RATIO);
status = clk_prog_construct_35_master(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pclkprog = (struct clk_prog_35_master_ratio *)(void *)*ppboardobj;
pclkprog = (struct clk_prog_35_master_ratio *)(void *)*obj;
pclkprog->super.super.super.super.pmudatainit =
clk_prog_pmudatainit_35_master_ratio;
@@ -891,9 +891,9 @@ static int clk_prog_construct_35_master_ratio(struct gk20a *g,
}
static int clk_prog_construct_35_master_table(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pargs)
struct pmu_board_obj **obj, size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct clk_prog_35_master_table *pclkprog;
struct clk_prog_35_master_table *ptmpprog =
(struct clk_prog_35_master_table *)pargs;
@@ -902,19 +902,19 @@ static int clk_prog_construct_35_master_table(struct gk20a *g,
sizeof(struct ctrl_clk_clk_prog_1x_master_table_slave_entry) *
g->pmu->clk_pmu->clk_progobjs->slave_entry_count;
nvgpu_log_info(g, "type - %x", BOARDOBJ_GET_TYPE(pargs));
nvgpu_log_info(g, "type - %x", pmu_board_obj_get_type(pargs));
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_PROG_TYPE_35_MASTER_TABLE) {
if (pmu_board_obj_get_type(pargs) != CTRL_CLK_CLK_PROG_TYPE_35_MASTER_TABLE) {
return -EINVAL;
}
ptmpobj->type_mask |= (u32)BIT(CTRL_CLK_CLK_PROG_TYPE_35_MASTER_TABLE);
status = clk_prog_construct_35_master(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_CLK_CLK_PROG_TYPE_35_MASTER_TABLE);
status = clk_prog_construct_35_master(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pclkprog = (struct clk_prog_35_master_table *)(void *)*ppboardobj;
pclkprog = (struct clk_prog_35_master_table *)(void *)*obj;
pclkprog->super.super.super.super.pmudatainit =
clk_prog_pmudatainit_35_master_table;
@@ -936,7 +936,7 @@ static int clk_prog_construct_35_master_table(struct gk20a *g,
exit:
if (status != 0) {
status = (*ppboardobj)->destruct(*ppboardobj);
status = (*obj)->destruct(*obj);
}
return status;
@@ -951,23 +951,23 @@ static struct clk_vf_point *get_vf_point_by_idx(
static struct clk_prog *construct_clk_prog(struct gk20a *g, void *pargs)
{
struct boardobj *board_obj_ptr = NULL;
struct pmu_board_obj *obj = NULL;
int status;
nvgpu_log_info(g, " type - %x", BOARDOBJ_GET_TYPE(pargs));
switch (BOARDOBJ_GET_TYPE(pargs)) {
nvgpu_log_info(g, " type - %x", pmu_board_obj_get_type(pargs));
switch (pmu_board_obj_get_type(pargs)) {
case CTRL_CLK_CLK_PROG_TYPE_35:
status = clk_prog_construct_35(g, &board_obj_ptr,
status = clk_prog_construct_35(g, &obj,
sizeof(struct clk_prog_1x), pargs);
break;
case CTRL_CLK_CLK_PROG_TYPE_35_MASTER_TABLE:
status = clk_prog_construct_35_master_table(g, &board_obj_ptr,
status = clk_prog_construct_35_master_table(g, &obj,
sizeof(struct clk_prog_35_master_table), pargs);
break;
case CTRL_CLK_CLK_PROG_TYPE_35_MASTER_RATIO:
status = clk_prog_construct_35_master_ratio(g, &board_obj_ptr,
status = clk_prog_construct_35_master_ratio(g, &obj,
sizeof(struct clk_prog_35_master_ratio), pargs);
break;
default:
@@ -977,8 +977,8 @@ static struct clk_prog *construct_clk_prog(struct gk20a *g, void *pargs)
}
if (status != 0) {
if (board_obj_ptr != NULL) {
status = board_obj_ptr->destruct(board_obj_ptr);
if (obj != NULL) {
status = obj->destruct(obj);
if (status != 0) {
nvgpu_err(g, "destruct failed err=%d", status);
}
@@ -988,7 +988,7 @@ static struct clk_prog *construct_clk_prog(struct gk20a *g, void *pargs)
nvgpu_log_info(g, " Done");
return (struct clk_prog *)(void *)board_obj_ptr;
return (struct clk_prog *)(void *)obj;
}
static int vfflatten_prog_1x_master(struct gk20a *g,
@@ -999,7 +999,7 @@ static int vfflatten_prog_1x_master(struct gk20a *g,
struct ctrl_clk_clk_prog_1x_master_vf_entry *p_vf_rail;
struct ctrl_clk_clk_prog_1x_source_pll *source_pll;
union {
struct boardobj board_obj;
struct pmu_board_obj obj;
struct clk_vf_point vf_point;
struct clk_vf_point_freq freq;
struct clk_vf_point_volt volt;
@@ -1046,7 +1046,7 @@ static int vfflatten_prog_1x_master(struct gk20a *g,
/* Intentional fall-through.*/
case CTRL_CLK_PROG_1X_SOURCE_ONE_SOURCE:
vf_point_data.board_obj.type =
vf_point_data.obj.type =
CTRL_CLK_CLK_VF_POINT_TYPE_35_FREQ;
do {
vf_point_data.vf_point.pair.freq_mhz =
@@ -1072,7 +1072,7 @@ static int vfflatten_prog_1x_master(struct gk20a *g,
clk_get_fll_lut_vf_num_entries(pclk);
/* FLL sources use a voltage-based VF_POINT.*/
vf_point_data.board_obj.type =
vf_point_data.obj.type =
CTRL_CLK_CLK_VF_POINT_TYPE_35_VOLT_PRI;
for (i = 0; i < step_count; i++) {
vf_point_data.volt.source_voltage_uv =

2
drivers/gpu/nvgpu/common/pmu/clk/clk_prog.h
View File

@@ -52,7 +52,7 @@ typedef int get_fpoints(struct gk20a *g, struct nvgpu_clk_pmupstate *pclk,
struct clk_prog {
struct boardobj super;
struct pmu_board_obj super;
};
struct clk_prog_1x {

94
drivers/gpu/nvgpu/common/pmu/clk/clk_vf_point.c
View File

@@ -61,8 +61,8 @@ int nvgpu_clk_domain_volt_to_freq(struct gk20a *g, u8 clkdomain_idx,
return status;
}
static int _clk_vf_point_pmudatainit_super(struct gk20a *g, struct boardobj
*board_obj_ptr, struct nv_pmu_boardobj *ppmudata);
static int _clk_vf_point_pmudatainit_super(struct gk20a *g, struct pmu_board_obj
*obj, struct nv_pmu_boardobj *pmu_obj);
static int _clk_vf_points_pmudatainit(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
@@ -84,7 +84,7 @@ done:
static int _clk_vf_points_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx)
struct nv_pmu_boardobj **pmu_obj, u8 idx)
{
struct nv_pmu_clk_clk_vf_point_boardobj_grp_set *pgrp_set =
(struct nv_pmu_clk_clk_vf_point_boardobj_grp_set *)
@@ -97,15 +97,15 @@ static int _clk_vf_points_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.board_obj;
*pmu_obj = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.obj;
nvgpu_log_info(g, " Done");
return 0;
}
static int _clk_vf_points_pmustatus_instget(struct gk20a *g,
void *pboardobjgrppmu,
struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx)
struct nv_pmu_boardobj_query **obj_pmu_status, u8 idx)
{
struct nv_pmu_clk_clk_vf_point_boardobj_grp_get_status
*pgrp_get_status =
@@ -117,8 +117,8 @@ static int _clk_vf_points_pmustatus_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmustatus = (struct nv_pmu_boardobj_query *)
&pgrp_get_status->objects[idx].data.board_obj;
*obj_pmu_status = (struct nv_pmu_boardobj_query *)(void *)
&pgrp_get_status->objects[idx].data.obj;
return 0;
}
@@ -190,7 +190,7 @@ int clk_vf_point_pmu_setup(struct gk20a *g)
}
static int clk_vf_point_construct_super(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pargs)
struct pmu_board_obj **obj, size_t size, void *pargs)
{
struct clk_vf_point *pclkvfpoint;
struct clk_vf_point *ptmpvfpoint =
@@ -202,13 +202,13 @@ static int clk_vf_point_construct_super(struct gk20a *g,
return -ENOMEM;
}
status = pmu_boardobj_construct_super(g,
(struct boardobj *)(void *)pclkvfpoint, pargs);
status = pmu_board_obj_construct_super(g,
(struct pmu_board_obj *)(void *)pclkvfpoint, pargs);
if (status != 0) {
return -EINVAL;
}
*ppboardobj = (struct boardobj *)(void *)pclkvfpoint;
*obj = (struct pmu_board_obj *)(void *)pclkvfpoint;
pclkvfpoint->super.pmudatainit =
_clk_vf_point_pmudatainit_super;
@@ -220,8 +220,8 @@ static int clk_vf_point_construct_super(struct gk20a *g,
}
static int _clk_vf_point_pmudatainit_volt(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct clk_vf_point_volt *pclk_vf_point_volt;
@@ -229,16 +229,16 @@ static int _clk_vf_point_pmudatainit_volt(struct gk20a *g,
nvgpu_log_info(g, " ");
status = _clk_vf_point_pmudatainit_super(g, board_obj_ptr, ppmudata);
status = _clk_vf_point_pmudatainit_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pclk_vf_point_volt =
(struct clk_vf_point_volt *)board_obj_ptr;
(struct clk_vf_point_volt *)(void *)obj;
pset = (struct nv_pmu_clk_clk_vf_point_volt_boardobj_set *)
ppmudata;
pmu_obj;
pset->source_voltage_uv = pclk_vf_point_volt->source_voltage_uv;
pset->freq_delta.data = pclk_vf_point_volt->freq_delta.data;
@@ -248,8 +248,8 @@ static int _clk_vf_point_pmudatainit_volt(struct gk20a *g,
}
static int _clk_vf_point_pmudatainit_freq(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct clk_vf_point_freq *pclk_vf_point_freq;
@@ -257,16 +257,16 @@ static int _clk_vf_point_pmudatainit_freq(struct gk20a *g,
nvgpu_log_info(g, " ");
status = _clk_vf_point_pmudatainit_super(g, board_obj_ptr, ppmudata);
status = _clk_vf_point_pmudatainit_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pclk_vf_point_freq =
(struct clk_vf_point_freq *)board_obj_ptr;
(struct clk_vf_point_freq *)(void *)obj;
pset = (struct nv_pmu_clk_clk_vf_point_freq_boardobj_set *)
ppmudata;
pmu_obj;
pset->freq_mhz = pclk_vf_point_freq->super.pair.freq_mhz;
@@ -276,26 +276,26 @@ static int _clk_vf_point_pmudatainit_freq(struct gk20a *g,
}
static int clk_vf_point_construct_volt_35(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pargs)
struct pmu_board_obj **obj, size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct clk_vf_point_volt *pclkvfpoint;
struct clk_vf_point_volt *ptmpvfpoint =
(struct clk_vf_point_volt *)pargs;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) !=
if (pmu_board_obj_get_type(pargs) !=
CTRL_CLK_CLK_VF_POINT_TYPE_35_VOLT_PRI) {
return -EINVAL;
}
ptmpobj->type_mask = (u32) BIT(CTRL_CLK_CLK_VF_POINT_TYPE_35_VOLT_PRI);
status = clk_vf_point_construct_super(g, ppboardobj, size, pargs);
obj_tmp->type_mask = (u32) BIT(CTRL_CLK_CLK_VF_POINT_TYPE_35_VOLT_PRI);
status = clk_vf_point_construct_super(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pclkvfpoint = (struct clk_vf_point_volt *) (void *) *ppboardobj;
pclkvfpoint = (struct clk_vf_point_volt *) (void *) *obj;
pclkvfpoint->super.super.pmudatainit =
_clk_vf_point_pmudatainit_volt;
@@ -307,25 +307,25 @@ static int clk_vf_point_construct_volt_35(struct gk20a *g,
}
static int clk_vf_point_construct_freq_35(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pargs)
struct pmu_board_obj **obj, size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct clk_vf_point_freq *pclkvfpoint;
struct clk_vf_point_freq *ptmpvfpoint =
(struct clk_vf_point_freq *)pargs;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_CLK_VF_POINT_TYPE_35_FREQ) {
if (pmu_board_obj_get_type(pargs) != CTRL_CLK_CLK_VF_POINT_TYPE_35_FREQ) {
return -EINVAL;
}
ptmpobj->type_mask = (u32) BIT(CTRL_CLK_CLK_VF_POINT_TYPE_35_FREQ);
status = clk_vf_point_construct_super(g, ppboardobj, size, pargs);
obj_tmp->type_mask = (u32) BIT(CTRL_CLK_CLK_VF_POINT_TYPE_35_FREQ);
status = clk_vf_point_construct_super(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pclkvfpoint = (struct clk_vf_point_freq *)(void*) *ppboardobj;
pclkvfpoint = (struct clk_vf_point_freq *)(void *) *obj;
pclkvfpoint->super.super.pmudatainit =
_clk_vf_point_pmudatainit_freq;
@@ -337,19 +337,19 @@ static int clk_vf_point_construct_freq_35(struct gk20a *g,
struct clk_vf_point *nvgpu_construct_clk_vf_point(struct gk20a *g, void *pargs)
{
struct boardobj *board_obj_ptr = NULL;
struct pmu_board_obj *obj = NULL;
int status;
nvgpu_log_info(g, " ");
switch (BOARDOBJ_GET_TYPE(pargs)) {
switch (pmu_board_obj_get_type(pargs)) {
case CTRL_CLK_CLK_VF_POINT_TYPE_35_FREQ:
status = clk_vf_point_construct_freq_35(g, &board_obj_ptr,
status = clk_vf_point_construct_freq_35(g, &obj,
sizeof(struct clk_vf_point_freq), pargs);
break;
case CTRL_CLK_CLK_VF_POINT_TYPE_35_VOLT_PRI:
status = clk_vf_point_construct_volt_35(g, &board_obj_ptr,
status = clk_vf_point_construct_volt_35(g, &obj,
sizeof(struct clk_vf_point_volt), pargs);
break;
@@ -364,12 +364,12 @@ struct clk_vf_point *nvgpu_construct_clk_vf_point(struct gk20a *g, void *pargs)
nvgpu_log_info(g, " Done");
return (struct clk_vf_point *)(void *)board_obj_ptr;
return (struct clk_vf_point *)(void *)obj;
}
static int _clk_vf_point_pmudatainit_super(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct clk_vf_point *pclk_vf_point;
@@ -377,16 +377,16 @@ static int _clk_vf_point_pmudatainit_super(struct gk20a *g,
nvgpu_log_info(g, " ");
status = nvgpu_boardobj_pmu_data_init_super(g, board_obj_ptr, ppmudata);
status = pmu_board_obj_pmu_data_init_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pclk_vf_point =
(struct clk_vf_point *)board_obj_ptr;
(struct clk_vf_point *)(void *)obj;
pset = (struct nv_pmu_clk_clk_vf_point_boardobj_set *)
ppmudata;
pmu_obj;
pset->vfe_equ_idx = pclk_vf_point->vfe_equ_idx;
@@ -454,7 +454,7 @@ int nvgpu_clk_vf_point_cache(struct gk20a *g)
{
struct nvgpu_clk_vf_points *pclk_vf_points;
struct boardobjgrp *pboardobjgrp;
struct boardobj *pboardobj = NULL;
struct pmu_board_obj *obj = NULL;
int status;
struct clk_vf_point *pclk_vf_point;
u8 index;
@@ -468,8 +468,8 @@ int nvgpu_clk_vf_point_cache(struct gk20a *g)
voltage_min_uv = nvgpu_pmu_clk_fll_get_lut_min_volt(g->pmu->clk_pmu);
voltage_step_size_uv =
nvgpu_pmu_clk_fll_get_lut_step_size(g->pmu->clk_pmu);
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) {
pclk_vf_point = (struct clk_vf_point *)(void *)pboardobj;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct pmu_board_obj*, obj, index) {
pclk_vf_point = (struct clk_vf_point *)(void *)obj;
gpcclk_voltuv =
voltage_min_uv + index * voltage_step_size_uv;
status = nvgpu_clk_domain_volt_to_freq(g, 0, &gpcclk_clkmhz,

78
drivers/gpu/nvgpu/common/pmu/clk/clk_vin.c
View File

@@ -41,18 +41,18 @@ static int devinit_get_vin_device_table(struct gk20a *g,
struct nvgpu_avfsvinobjs *pvinobjs);
static int vin_device_construct_v20(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pargs);
struct pmu_board_obj **obj, size_t size, void *pargs);
static int vin_device_construct_super(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pargs);
struct pmu_board_obj **obj, size_t size, void *pargs);
static struct clk_vin_device *construct_vin_device(
struct gk20a *g, void *pargs);
static int vin_device_init_pmudata_v20(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata);
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj);
static int vin_device_init_pmudata_super(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata);
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj);
struct clk_vin_device *clk_get_vin_from_index(
struct nvgpu_avfsvinobjs *pvinobjs, u8 idx)
@@ -116,7 +116,7 @@ static int _clk_vin_devgrp_pmudatainit_super(struct gk20a *g,
static int _clk_vin_devgrp_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx)
struct nv_pmu_boardobj **pmu_obj, u8 idx)
{
struct nv_pmu_clk_clk_vin_device_boardobj_grp_set *pgrp_set =
(struct nv_pmu_clk_clk_vin_device_boardobj_grp_set *)
@@ -130,15 +130,15 @@ static int _clk_vin_devgrp_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.board_obj;
*pmu_obj = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.obj;
nvgpu_log_info(g, " Done");
return 0;
}
static int _clk_vin_devgrp_pmustatus_instget(struct gk20a *g,
void *pboardobjgrppmu,
struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx)
struct nv_pmu_boardobj_query **obj_pmu_status, u8 idx)
{
struct nv_pmu_clk_clk_vin_device_boardobj_grp_get_status
*pgrp_get_status =
@@ -151,8 +151,8 @@ static int _clk_vin_devgrp_pmustatus_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmustatus = (struct nv_pmu_boardobj_query *)
&pgrp_get_status->objects[idx].data.board_obj;
*obj_pmu_status = (struct nv_pmu_boardobj_query *)
&pgrp_get_status->objects[idx].data.obj;
return 0;
}
@@ -253,7 +253,7 @@ static int devinit_get_vin_device_table(struct gk20a *g,
u32 cal_type;
union {
struct boardobj boardobj;
struct pmu_board_obj obj;
struct clk_vin_device vin_device;
struct vin_device_v20 vin_device_v20;
} vin_device_data;
@@ -304,7 +304,7 @@ static int devinit_get_vin_device_table(struct gk20a *g,
continue;
}
vin_device_data.boardobj.type =
vin_device_data.obj.type =
(u8)vin_desc_table_entry.vin_device_type;
vin_device_data.vin_device.id =
(u8)vin_desc_table_entry.vin_device_id;
@@ -326,7 +326,7 @@ static int devinit_get_vin_device_table(struct gk20a *g,
pvin_dev = construct_vin_device(g, (void *)&vin_device_data);
status = boardobjgrp_objinsert(&pvinobjs->super.super,
(struct boardobj *)pvin_dev, index);
(struct pmu_board_obj *)pvin_dev, index);
vin_tbl_entry_ptr += vin_desc_table_header.entry_size;
}
@@ -337,24 +337,24 @@ done:
}
static int vin_device_construct_v20(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pargs)
struct pmu_board_obj **obj, size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct vin_device_v20 *pvin_device_v20;
struct vin_device_v20 *ptmpvin_device_v20 = (struct vin_device_v20 *)pargs;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_CLK_VIN_TYPE_V20) {
if (pmu_board_obj_get_type(pargs) != CTRL_CLK_VIN_TYPE_V20) {
return -EINVAL;
}
ptmpobj->type_mask |= BIT32(CTRL_CLK_VIN_TYPE_V20);
status = vin_device_construct_super(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= BIT32(CTRL_CLK_VIN_TYPE_V20);
status = vin_device_construct_super(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvin_device_v20 = (struct vin_device_v20 *)*ppboardobj;
pvin_device_v20 = (struct vin_device_v20 *)(void *)*obj;
pvin_device_v20->super.super.pmudatainit =
vin_device_init_pmudata_v20;
@@ -370,7 +370,7 @@ static int vin_device_construct_v20(struct gk20a *g,
return status;
}
static int vin_device_construct_super(struct gk20a *g,
struct boardobj **obj, size_t size, void *pargs)
struct pmu_board_obj **obj, size_t size, void *pargs)
{
struct clk_vin_device *pvin_device;
struct clk_vin_device *ptmpvin_device =
@@ -382,13 +382,13 @@ static int vin_device_construct_super(struct gk20a *g,
return -ENOMEM;
}
status = pmu_boardobj_construct_super(g,
(struct boardobj *)(void *)pvin_device, pargs);
status = pmu_board_obj_construct_super(g,
(struct pmu_board_obj *)(void *)pvin_device, pargs);
if (status != 0) {
return -EINVAL;
}
*obj = (struct boardobj *)(void *)pvin_device;
*obj = (struct pmu_board_obj *)(void *)pvin_device;
pvin_device->super.pmudatainit =
vin_device_init_pmudata_super;
@@ -405,12 +405,12 @@ static int vin_device_construct_super(struct gk20a *g,
static struct clk_vin_device *construct_vin_device(
struct gk20a *g, void *pargs)
{
struct boardobj *board_obj_ptr = NULL;
struct pmu_board_obj *obj = NULL;
int status;
nvgpu_log_info(g, " %d", BOARDOBJ_GET_TYPE(pargs));
nvgpu_log_info(g, " %d", pmu_board_obj_get_type(pargs));
status = vin_device_construct_v20(g, &board_obj_ptr,
status = vin_device_construct_v20(g, &obj,
sizeof(struct vin_device_v20), pargs);
if (status != 0) {
@@ -419,12 +419,12 @@ static struct clk_vin_device *construct_vin_device(
nvgpu_log_info(g, " Done");
return (struct clk_vin_device *)board_obj_ptr;
return (struct clk_vin_device *)(void *)obj;
}
static int vin_device_init_pmudata_v20(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct vin_device_v20 *pvin_dev_v20;
@@ -432,14 +432,14 @@ static int vin_device_init_pmudata_v20(struct gk20a *g,
nvgpu_log_info(g, " ");
status = vin_device_init_pmudata_super(g, board_obj_ptr, ppmudata);
status = vin_device_init_pmudata_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pvin_dev_v20 = (struct vin_device_v20 *)board_obj_ptr;
pvin_dev_v20 = (struct vin_device_v20 *)(void *)obj;
perf_pmu_data = (struct nv_pmu_clk_clk_vin_device_v20_boardobj_set *)
ppmudata;
pmu_obj;
perf_pmu_data->data.cal_type = pvin_dev_v20->data.cal_type;
perf_pmu_data->data.vin_cal.cal_v20.offset =
@@ -455,8 +455,8 @@ static int vin_device_init_pmudata_v20(struct gk20a *g,
}
static int vin_device_init_pmudata_super(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct clk_vin_device *pvin_dev;
@@ -464,14 +464,14 @@ static int vin_device_init_pmudata_super(struct gk20a *g,
nvgpu_log_info(g, " ");
status = nvgpu_boardobj_pmu_data_init_super(g, board_obj_ptr, ppmudata);
status = pmu_board_obj_pmu_data_init_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pvin_dev = (struct clk_vin_device *)board_obj_ptr;
pvin_dev = (struct clk_vin_device *)(void *)obj;
perf_pmu_data = (struct nv_pmu_clk_clk_vin_device_boardobj_set *)
ppmudata;
pmu_obj;
perf_pmu_data->id = pvin_dev->id;
perf_pmu_data->volt_rail_idx =

2
drivers/gpu/nvgpu/common/pmu/clk/clk_vin.h
View File

@@ -31,7 +31,7 @@ typedef u32 vin_device_state_load(struct gk20a *g,
struct nvgpu_clk_pmupstate *clk, struct clk_vin_device *pdev);
struct clk_vin_device {
struct boardobj super;
struct pmu_board_obj super;
u8 id;
u8 volt_domain;
u8 volt_domain_vbios;

19
drivers/gpu/nvgpu/common/pmu/clk/ucode_clk_inf.h
View File

@@ -374,7 +374,7 @@ struct nv_pmu_clk_clk_domain_35_slave_boardobj_set {
};
union nv_pmu_clk_clk_domain_boardobj_set_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_clk_clk_domain_boardobj_set super;
struct nv_pmu_clk_clk_domain_3x_boardobj_set v3x;
struct nv_pmu_clk_clk_domain_3x_fixed_boardobj_set v3x_fixed;
@@ -471,7 +471,7 @@ struct nv_pmu_clk_clk_prog_35_master_table_boardobj_set {
};
union nv_pmu_clk_clk_prog_boardobj_set_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_clk_clk_prog_boardobj_set super;
struct nv_pmu_clk_clk_prog_1x_boardobj_set v1x;
struct nv_pmu_clk_clk_prog_1x_master_boardobj_set v1x_master;
@@ -527,7 +527,7 @@ struct nv_pmu_clk_clk_fll_device_boardobj_set {
};
union nv_pmu_clk_clk_fll_device_boardobj_set_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_clk_clk_fll_device_boardobj_set super;
};
@@ -555,7 +555,7 @@ struct nv_pmu_clk_clk_vin_device_v20_boardobj_set {
};
union nv_pmu_clk_clk_vin_device_boardobj_set_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_clk_clk_vin_device_boardobj_set super;
struct nv_pmu_clk_clk_vin_device_v20_boardobj_set v20;
};
@@ -593,14 +593,14 @@ struct nv_pmu_clk_clk_vf_point_volt_35_sec_boardobj_set {
};
union nv_pmu_clk_clk_vf_point_boardobj_set_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_clk_clk_vf_point_boardobj_set super;
struct nv_pmu_clk_clk_vf_point_freq_boardobj_set freq;
struct nv_pmu_clk_clk_vf_point_volt_boardobj_set volt;
};
union nv_pmu_clk_clk_vf_point_sec_boardobj_set_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_clk_clk_vf_point_boardobj_set super;
struct nv_pmu_clk_clk_vf_point_freq_boardobj_set freq;
struct nv_pmu_clk_clk_vf_point_volt_boardobj_set volt;
@@ -653,7 +653,7 @@ struct nv_pmu_clk_clk_vf_point_volt_boardobj_get_status {
};
union nv_pmu_clk_clk_vf_point_boardobj_get_status_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_clk_clk_vf_point_boardobj_get_status super;
struct nv_pmu_clk_clk_vf_point_volt_boardobj_get_status volt;
struct nv_pmu_clk_clk_vf_point_35_freq_boardobj_get_status v35_freq;
@@ -731,7 +731,7 @@ struct nv_pmu_clk_clk_vin_device_boardobj_get_status {
};
union nv_pmu_clk_clk_vin_device_boardobj_get_status_union {
struct nv_pmu_boardobj_query board_obj;
struct nv_pmu_boardobj_query obj;
struct nv_pmu_clk_clk_vin_device_boardobj_get_status super;
};
@@ -756,11 +756,10 @@ struct nv_pmu_clk_clk_fll_device_boardobj_get_status {
};
union nv_pmu_clk_clk_fll_device_boardobj_get_status_union {
struct nv_pmu_boardobj_query board_obj;
struct nv_pmu_boardobj_query obj;
struct nv_pmu_clk_clk_fll_device_boardobj_get_status super;
};
NV_PMU_BOARDOBJ_GRP_GET_STATUS_MAKE_E32(clk, clk_fll_device);
#endif /* NVGPU_PMUIF_CLK_H */

1
drivers/gpu/nvgpu/common/pmu/fw/fw_ver_ops.c
View File

@@ -38,7 +38,6 @@
#include <nvgpu/pmu/super_surface.h>
#include <nvgpu/pmu/fw.h>
#include <nvgpu/pmu/seq.h>
#include <common/pmu/boardobj/boardobj.h>
/* PMU F/W version */
#define APP_VERSION_TU10X 28084434U

39
drivers/gpu/nvgpu/common/pmu/perf/pstate.c
View File

@@ -55,28 +55,28 @@ int perf_pstate_get_table_entry_idx(struct gk20a *g, u32 num)
}
static int pstate_init_pmudata_super(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
return nvgpu_boardobj_pmu_data_init_super(g, board_obj_ptr, ppmudata);
return pmu_board_obj_pmu_data_init_super(g, obj, pmu_obj);
}
static int pstate_init_pmudata(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
u32 clkidx;
struct pstate *pstate;
struct nv_pmu_perf_pstate_35 *pstate_pmu_data;
status = pstate_init_pmudata_super(g, board_obj_ptr, ppmudata);
status = pstate_init_pmudata_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pstate = (struct pstate *)board_obj_ptr;
pstate_pmu_data = (struct nv_pmu_perf_pstate_35 *)ppmudata;
pstate = (struct pstate *)(void *)obj;
pstate_pmu_data = (struct nv_pmu_perf_pstate_35 *)(void *)pmu_obj;
pstate_pmu_data->super.super.lpwrEntryIdx = pstate->lpwr_entry_idx;
pstate_pmu_data->super.super.flags = pstate->flags;
@@ -115,12 +115,12 @@ static int pstate_init_pmudata(struct gk20a *g,
return status;
}
static int pstate_construct_super(struct gk20a *g, struct boardobj *ppboardobj,
static int pstate_construct_super(struct gk20a *g, struct pmu_board_obj *obj,
void *args)
{
int status;
status = pmu_boardobj_construct_super(g, ppboardobj, args);
status = pmu_board_obj_construct_super(g, obj, args);
if (status != 0) {
return -EINVAL;
}
@@ -128,13 +128,13 @@ static int pstate_construct_super(struct gk20a *g, struct boardobj *ppboardobj,
return 0;
}
static int pstate_construct_35(struct gk20a *g, struct boardobj *ppboardobj,
static int pstate_construct_35(struct gk20a *g, struct pmu_board_obj *obj,
void *args)
{
struct boardobj *ptmpobj = (struct boardobj *)args;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)args;
ptmpobj->type_mask |= BIT32(CTRL_PERF_PSTATE_TYPE_35);
return pstate_construct_super(g, ppboardobj, args);
obj_tmp->type_mask |= BIT32(CTRL_PERF_PSTATE_TYPE_35);
return pstate_construct_super(g, obj, args);
}
static struct pstate *pstate_construct(struct gk20a *g, void *args)
@@ -149,7 +149,8 @@ static struct pstate *pstate_construct(struct gk20a *g, void *args)
return NULL;
}
status = pstate_construct_35(g, (struct boardobj *)(void *)pstate, args);
status = pstate_construct_35(g, (struct pmu_board_obj *)
(void *)pstate, args);
if (status != 0) {
nvgpu_err(g,
"error constructing pstate num=%u", ptmppstate->num);
@@ -184,7 +185,7 @@ static int pstate_insert(struct gk20a *g, struct pstate *pstate, u8 index)
int err;
err = boardobjgrp_objinsert(&pstates->super.super,
(struct boardobj *)pstate, index);
(struct pmu_board_obj *)pstate, index);
if (err != 0) {
nvgpu_err(g,
"error adding pstate boardobj %d", index);
@@ -354,7 +355,7 @@ done:
static int perf_pstate_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx)
struct nv_pmu_boardobj **pmu_obj, u8 idx)
{
struct nv_pmu_perf_pstate_boardobj_grp_set *pgrp_set =
(struct nv_pmu_perf_pstate_boardobj_grp_set *)
@@ -365,8 +366,8 @@ static int perf_pstate_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.boardObj;
*pmu_obj = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.obj;
return 0;
}

2
drivers/gpu/nvgpu/common/pmu/perf/pstate.h
View File

@@ -38,7 +38,7 @@ struct pstates {
};
struct pstate {
struct boardobj super;
struct pmu_board_obj super;
u32 num;
u8 lpwr_entry_idx;
u32 flags;

4
drivers/gpu/nvgpu/common/pmu/perf/ucode_perf_pstate_inf.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -75,7 +75,7 @@ struct nv_pmu_perf_pstate_35 {
};
union nv_pmu_perf_pstate_boardobj_set_union {
struct nv_pmu_boardobj boardObj;
struct nv_pmu_boardobj obj;
struct nv_pmu_perf_pstate super;
struct nv_pmu_perf_pstate_3x v3x;
struct nv_pmu_perf_pstate_30 v30;

8
drivers/gpu/nvgpu/common/pmu/perf/ucode_perf_vfe_inf.h
View File

@@ -116,7 +116,7 @@ struct nv_pmu_perf_vfe_var_boardobjgrp_get_status_header {
};
struct nv_pmu_perf_vfe_var_get_status_super {
struct nv_pmu_boardobj_query board_obj;
struct nv_pmu_boardobj_query obj;
};
union ctrl_perf_vfe_var_single_sensed_fuse_value_data {
@@ -138,7 +138,7 @@ struct nv_pmu_perf_vfe_var_single_sensed_fuse_get_status {
};
union nv_pmu_perf_vfe_var_boardobj_get_status_union {
struct nv_pmu_boardobj_query board_obj;
struct nv_pmu_boardobj_query obj;
struct nv_pmu_perf_vfe_var_get_status_super super;
struct nv_pmu_perf_vfe_var_single_sensed_fuse_get_status fuse_status;
};
@@ -278,7 +278,7 @@ struct nv_pmu_perf_vfe_var_boardobjgrp_set_header {
};
union nv_pmu_perf_vfe_var_boardobj_set_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_vfe_var var;
struct nv_pmu_vfe_var_derived var_derived;
struct nv_pmu_vfe_var_derived_product var_derived_product;
@@ -339,7 +339,7 @@ struct nv_pmu_perf_vfe_equ_boardobjgrp_set_header {
};
union nv_pmu_perf_vfe_equ_boardobj_set_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_vfe_equ equ;
struct nv_pmu_vfe_equ_compare equ_comapre;
struct nv_pmu_vfe_equ_minmax equ_minmax;

152
drivers/gpu/nvgpu/common/pmu/perf/vfe_equ.c
View File

@@ -180,14 +180,14 @@ static int vfe_equ_dependency_mask_build(struct gk20a *g,
struct vfe_equ *tmp_vfe_equ;
struct vfe_var *tmp_vfe_var;
u8 index_1, index_2;
struct boardobj *pboardobj_1 = NULL, *pboardobj_2 = NULL;
struct pmu_board_obj *obj_tmp_1 = NULL, *obj_tmp_2 = NULL;
struct boardobjgrp *pboardobjgrp_equ = &(pvfe_equs->super.super);
struct boardobjgrp *pboardobjgrp_var = &(pvfe_vars->super.super);
/* Initialize mask_depending_vars */
BOARDOBJGRP_FOR_EACH(pboardobjgrp_equ, struct boardobj*,
pboardobj_1, index_1) {
tmp_vfe_equ = (struct vfe_equ *)(void *)pboardobj_1;
BOARDOBJGRP_FOR_EACH(pboardobjgrp_equ, struct pmu_board_obj*,
obj_tmp_1, index_1) {
tmp_vfe_equ = (struct vfe_equ *)(void *)obj_tmp_1;
status = tmp_vfe_equ->mask_depending_build(g, pboardobjgrp_equ,
tmp_vfe_equ);
if (status != 0) {
@@ -197,13 +197,13 @@ static int vfe_equ_dependency_mask_build(struct gk20a *g,
}
}
/* Initialize mask_dependent_vars */
BOARDOBJGRP_FOR_EACH(pboardobjgrp_equ, struct boardobj*,
pboardobj_1, index_1) {
tmp_vfe_equ = (struct vfe_equ *)(void *)pboardobj_1;
BOARDOBJGRP_ITERATOR(pboardobjgrp_var, struct boardobj*,
pboardobj_2, index_2,
BOARDOBJGRP_FOR_EACH(pboardobjgrp_equ, struct pmu_board_obj*,
obj_tmp_1, index_1) {
tmp_vfe_equ = (struct vfe_equ *)(void *)obj_tmp_1;
BOARDOBJGRP_ITERATOR(pboardobjgrp_var, struct pmu_board_obj*,
obj_tmp_2, index_2,
&tmp_vfe_equ->mask_depending_vars.super) {
tmp_vfe_var = (struct vfe_var *)(void *)pboardobj_2;
tmp_vfe_var = (struct vfe_var *)(void *)obj_tmp_2;
status = nvgpu_boardobjgrpmask_bit_set(
&tmp_vfe_var->mask_dependent_equs.super,
index_1);
@@ -236,7 +236,7 @@ done:
static int vfe_equs_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata,
struct nv_pmu_boardobj **pmu_obj,
u8 idx)
{
struct nv_pmu_perf_vfe_equ_boardobj_grp_set *pgrp_set =
@@ -247,8 +247,8 @@ static int vfe_equs_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.board_obj;
*pmu_obj = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.obj;
nvgpu_log_info(g, " Done");
return 0;
}
@@ -256,22 +256,22 @@ static int vfe_equs_pmudata_instget(struct gk20a *g,
static int vfe_equ_pmudatainit_super(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct vfe_equ *pvfe_equ;
struct nv_pmu_vfe_equ *pset;
status = nvgpu_boardobj_pmu_data_init_super(g, board_obj_ptr, ppmudata);
status = pmu_board_obj_pmu_data_init_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pvfe_equ = (struct vfe_equ *)(void *)board_obj_ptr;
pvfe_equ = (struct vfe_equ *)(void *)obj;
pset = (struct nv_pmu_vfe_equ *)(void *)
ppmudata;
pmu_obj;
pset->var_idx = pvfe_equ->var_idx;
pset->equ_idx_next = pvfe_equ->equ_idx_next;
@@ -283,7 +283,7 @@ static int vfe_equ_pmudatainit_super(struct gk20a *g,
}
static int vfe_equ_construct_super(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct vfe_equ *pvfeequ;
@@ -295,13 +295,13 @@ static int vfe_equ_construct_super(struct gk20a *g,
return -ENOMEM;
}
status = pmu_boardobj_construct_super(g,
(struct boardobj *)(void *)pvfeequ, pargs);
status = pmu_board_obj_construct_super(g,
(struct pmu_board_obj *)(void *)pvfeequ, pargs);
if (status != 0) {
return -EINVAL;
}
*ppboardobj = (struct boardobj *)(void *)pvfeequ;
*obj = (struct pmu_board_obj *)(void *)pvfeequ;
status = boardobjgrpmask_e32_init(&pvfeequ->mask_depending_vars, NULL);
pvfeequ->super.pmudatainit =
@@ -317,21 +317,21 @@ static int vfe_equ_construct_super(struct gk20a *g,
}
static int vfe_equ_pmudatainit_compare(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct vfe_equ_compare *pvfe_equ_compare;
struct nv_pmu_vfe_equ_compare *pset;
status = vfe_equ_pmudatainit_super(g, board_obj_ptr, ppmudata);
status = vfe_equ_pmudatainit_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pvfe_equ_compare = (struct vfe_equ_compare *)(void *)board_obj_ptr;
pvfe_equ_compare = (struct vfe_equ_compare *)(void *)obj;
pset = (struct nv_pmu_vfe_equ_compare *)(void *)ppmudata;
pset = (struct nv_pmu_vfe_equ_compare *)(void *)pmu_obj;
pset->func_id = pvfe_equ_compare->func_id;
pset->equ_idx_true = pvfe_equ_compare->equ_idx_true;
@@ -343,26 +343,26 @@ static int vfe_equ_pmudatainit_compare(struct gk20a *g,
static int vfe_equ_construct_compare(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct vfe_equ_compare *pvfeequ;
struct vfe_equ_compare *ptmpequ =
(struct vfe_equ_compare *)pargs;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_EQU_TYPE_COMPARE) {
if (pmu_board_obj_get_type(pargs) != CTRL_PERF_VFE_EQU_TYPE_COMPARE) {
return -EINVAL;
}
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_EQU_TYPE_COMPARE);
status = vfe_equ_construct_super(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_PERF_VFE_EQU_TYPE_COMPARE);
status = vfe_equ_construct_super(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfeequ = (struct vfe_equ_compare *)(void *)*ppboardobj;
pvfeequ = (struct vfe_equ_compare *)(void *)*obj;
pvfeequ->super.mask_depending_build =
vfe_equ_build_depending_mask_compare;
pvfeequ->super.super.pmudatainit =
@@ -378,22 +378,22 @@ static int vfe_equ_construct_compare(struct gk20a *g,
}
static int vfe_equ_pmudatainit_minmax(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct vfe_equ_minmax *pvfe_equ_minmax;
struct nv_pmu_vfe_equ_minmax *pset;
status = vfe_equ_pmudatainit_super(g, board_obj_ptr, ppmudata);
status = vfe_equ_pmudatainit_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pvfe_equ_minmax = (struct vfe_equ_minmax *)(void *)board_obj_ptr;
pvfe_equ_minmax = (struct vfe_equ_minmax *)(void *)obj;
pset = (struct nv_pmu_vfe_equ_minmax *)(void *)
ppmudata;
pmu_obj;
pset->b_max = pvfe_equ_minmax->b_max;
pset->equ_idx0 = pvfe_equ_minmax->equ_idx0;
@@ -403,26 +403,26 @@ static int vfe_equ_pmudatainit_minmax(struct gk20a *g,
}
static int vfe_equ_construct_minmax(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct vfe_equ_minmax *pvfeequ;
struct vfe_equ_minmax *ptmpequ =
(struct vfe_equ_minmax *)pargs;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_EQU_TYPE_MINMAX) {
if (pmu_board_obj_get_type(pargs) != CTRL_PERF_VFE_EQU_TYPE_MINMAX) {
return -EINVAL;
}
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_EQU_TYPE_MINMAX);
status = vfe_equ_construct_super(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_PERF_VFE_EQU_TYPE_MINMAX);
status = vfe_equ_construct_super(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfeequ = (struct vfe_equ_minmax *)(void *)*ppboardobj;
pvfeequ = (struct vfe_equ_minmax *)(void *)*obj;
pvfeequ->super.mask_depending_build =
vfe_equ_build_depending_mask_minmax;
pvfeequ->super.super.pmudatainit =
@@ -435,22 +435,22 @@ static int vfe_equ_construct_minmax(struct gk20a *g,
}
static int vfe_equ_pmudatainit_quadratic(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct vfe_equ_quadratic *pvfe_equ_quadratic;
struct nv_pmu_vfe_equ_quadratic *pset;
u32 i;
status = vfe_equ_pmudatainit_super(g, board_obj_ptr, ppmudata);
status = vfe_equ_pmudatainit_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pvfe_equ_quadratic = (struct vfe_equ_quadratic *)(void *)board_obj_ptr;
pvfe_equ_quadratic = (struct vfe_equ_quadratic *)(void *)obj;
pset = (struct nv_pmu_vfe_equ_quadratic *)(void *)ppmudata;
pset = (struct nv_pmu_vfe_equ_quadratic *)(void *)pmu_obj;
for (i = 0; i < CTRL_PERF_VFE_EQU_QUADRATIC_COEFF_COUNT; i++) {
pset->coeffs[i] = pvfe_equ_quadratic->coeffs[i];
@@ -460,27 +460,27 @@ static int vfe_equ_pmudatainit_quadratic(struct gk20a *g,
}
static int vfe_equ_construct_quadratic(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct vfe_equ_quadratic *pvfeequ;
struct vfe_equ_quadratic *ptmpequ =
(struct vfe_equ_quadratic *)pargs;
int status = 0;
u32 i;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_EQU_TYPE_QUADRATIC) {
if (pmu_board_obj_get_type(pargs) != CTRL_PERF_VFE_EQU_TYPE_QUADRATIC) {
return -EINVAL;
}
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_EQU_TYPE_QUADRATIC);
status = vfe_equ_construct_super(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_PERF_VFE_EQU_TYPE_QUADRATIC);
status = vfe_equ_construct_super(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfeequ = (struct vfe_equ_quadratic *)(void *)*ppboardobj;
pvfeequ = (struct vfe_equ_quadratic *)(void *)*obj;
pvfeequ->super.mask_depending_build =
vfe_equ_build_depending_mask_quad;
@@ -495,22 +495,22 @@ static int vfe_equ_construct_quadratic(struct gk20a *g,
}
static int vfe_equ_pmudatainit_scalar(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct vfe_equ_scalar *pvfe_equ_scalar;
struct nv_pmu_vfe_equ_scalar *pset;
status = vfe_equ_pmudatainit_super(g, board_obj_ptr, ppmudata);
status = vfe_equ_pmudatainit_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pvfe_equ_scalar = (struct vfe_equ_scalar *)(void *)board_obj_ptr;
pvfe_equ_scalar = (struct vfe_equ_scalar *)(void *)obj;
pset = (struct nv_pmu_vfe_equ_scalar *)(void *)
ppmudata;
pmu_obj;
pset->equ_idx_to_scale = pvfe_equ_scalar->equ_idx_to_scale;
@@ -518,26 +518,26 @@ static int vfe_equ_pmudatainit_scalar(struct gk20a *g,
}
static int vfe_equ_construct_scalar(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct vfe_equ_scalar *pvfeequ;
struct vfe_equ_scalar *ptmpequ =
(struct vfe_equ_scalar *)pargs;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_EQU_TYPE_SCALAR) {
if (pmu_board_obj_get_type(pargs) != CTRL_PERF_VFE_EQU_TYPE_SCALAR) {
return -EINVAL;
}
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_EQU_TYPE_SCALAR);
status = vfe_equ_construct_super(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_PERF_VFE_EQU_TYPE_SCALAR);
status = vfe_equ_construct_super(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfeequ = (struct vfe_equ_scalar *)(void *)*ppboardobj;
pvfeequ = (struct vfe_equ_scalar *)(void *)*obj;
pvfeequ->super.mask_depending_build =
vfe_equ_build_depending_mask_equ_scalar;
@@ -551,27 +551,27 @@ static int vfe_equ_construct_scalar(struct gk20a *g,
static struct vfe_equ *construct_vfe_equ(struct gk20a *g, void *pargs)
{
struct boardobj *board_obj_ptr = NULL;
struct pmu_board_obj *obj = NULL;
int status;
switch (BOARDOBJ_GET_TYPE(pargs)) {
switch (pmu_board_obj_get_type(pargs)) {
case CTRL_PERF_VFE_EQU_TYPE_COMPARE:
status = vfe_equ_construct_compare(g, &board_obj_ptr,
status = vfe_equ_construct_compare(g, &obj,
sizeof(struct vfe_equ_compare), pargs);
break;
case CTRL_PERF_VFE_EQU_TYPE_MINMAX:
status = vfe_equ_construct_minmax(g, &board_obj_ptr,
status = vfe_equ_construct_minmax(g, &obj,
sizeof(struct vfe_equ_minmax), pargs);
break;
case CTRL_PERF_VFE_EQU_TYPE_QUADRATIC:
status = vfe_equ_construct_quadratic(g, &board_obj_ptr,
status = vfe_equ_construct_quadratic(g, &obj,
sizeof(struct vfe_equ_quadratic), pargs);
break;
case CTRL_PERF_VFE_EQU_TYPE_SCALAR:
status = vfe_equ_construct_scalar(g, &board_obj_ptr,
status = vfe_equ_construct_scalar(g, &obj,
sizeof(struct vfe_equ_scalar), pargs);
break;
@@ -586,7 +586,7 @@ static struct vfe_equ *construct_vfe_equ(struct gk20a *g, void *pargs)
nvgpu_log_info(g, " Done");
return (struct vfe_equ *)board_obj_ptr;
return (struct vfe_equ *)(void *)obj;
}
static int devinit_get_vfe_equ_table(struct gk20a *g,
@@ -605,7 +605,7 @@ static int devinit_get_vfe_equ_table(struct gk20a *g,
bool done = false;
u32 hdrszfmt = 0;
union {
struct boardobj board_obj;
struct pmu_board_obj obj;
struct vfe_equ super;
struct vfe_equ_compare compare;
struct vfe_equ_minmax minmax;
@@ -828,7 +828,7 @@ static int devinit_get_vfe_equ_table(struct gk20a *g,
goto done;
}
equ_data.board_obj.type = equ_type;
equ_data.obj.type = equ_type;
pequ = construct_vfe_equ(g, (void *)&equ_data);
if (pequ == NULL) {
@@ -839,7 +839,7 @@ static int devinit_get_vfe_equ_table(struct gk20a *g,
}
status = boardobjgrp_objinsert(&pvfeequobjs->super.super,
(struct boardobj *)pequ, index);
(struct pmu_board_obj *)pequ, index);
if (status != 0) {
nvgpu_err(g, "error adding vfe_equ boardobj %d", index);
status = -EINVAL;

2
drivers/gpu/nvgpu/common/pmu/perf/vfe_equ.h
View File

@@ -31,7 +31,7 @@ struct vfe_equs {
};
struct vfe_equ {
struct boardobj super;
struct pmu_board_obj super;
u8 var_idx;
u8 equ_idx_next;
u8 output_type;

300
drivers/gpu/nvgpu/common/pmu/perf/vfe_var.c
View File

@@ -58,7 +58,7 @@ done:
static int vfe_vars_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata,
struct nv_pmu_boardobj **pmu_obj,
u8 idx)
{
struct nv_pmu_perf_vfe_var_boardobj_grp_set *pgrp_set =
@@ -70,15 +70,15 @@ static int vfe_vars_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.board_obj;
*pmu_obj = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.obj;
nvgpu_log_info(g, " Done");
return 0;
}
static int vfe_vars_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu,
struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx)
struct nv_pmu_boardobj_query **obj_pmu_status, u8 idx)
{
struct nv_pmu_perf_vfe_var_boardobj_grp_get_status *pgrp_get_status =
(struct nv_pmu_perf_vfe_var_boardobj_grp_get_status *)
@@ -89,20 +89,20 @@ static int vfe_vars_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu,
return -EINVAL;
}
*ppboardobjpmustatus = (struct nv_pmu_boardobj_query *)
&pgrp_get_status->objects[idx].data.board_obj;
*obj_pmu_status = (struct nv_pmu_boardobj_query *)
&pgrp_get_status->objects[idx].data.obj;
return 0;
}
static int vfe_var_get_s_param_value(struct gk20a *g,
struct vfe_var_single_sensed_fuse *fuse_value,
struct nv_pmu_boardobj *ppmudata)
struct nv_pmu_boardobj *pmu_obj)
{
struct nv_pmu_perf_vfe_var_single_sensed_fuse_get_status *pstatus;
pstatus = (struct nv_pmu_perf_vfe_var_single_sensed_fuse_get_status *)
(void *)ppmudata;
(void *)pmu_obj;
if (pstatus->super.board_obj.type !=
if (pstatus->super.obj.type !=
fuse_value->super.super.super.super.type) {
nvgpu_err(g, "pmu data and boardobj type not matching");
return -EINVAL;
@@ -132,13 +132,13 @@ static int vfe_var_dependency_mask_build(struct gk20a *g,
int status;
u8 index_1 = 0, index_2 = 0;
struct vfe_var *tmp_vfe_var_1 = NULL, *tmp_vfe_var_2 = NULL;
struct boardobj *pboardobj_1 = NULL, *pboardobj_2 = NULL;
struct pmu_board_obj *obj_tmp_1 = NULL, *obj_tmp_2 = NULL;
struct boardobjgrp *pboardobjgrp = &(pvfe_vars->super.super);
/* Initialize mask_depending_vars */
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*,
pboardobj_1, index_1) {
tmp_vfe_var_1 = (struct vfe_var *)(void *)pboardobj_1;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct pmu_board_obj*,
obj_tmp_1, index_1) {
tmp_vfe_var_1 = (struct vfe_var *)(void *)obj_tmp_1;
status = tmp_vfe_var_1->mask_depending_build(g, pboardobjgrp,
tmp_vfe_var_1);
if (status != 0) {
@@ -148,13 +148,13 @@ static int vfe_var_dependency_mask_build(struct gk20a *g,
}
}
/* Initialize mask_dependent_vars */
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*,
pboardobj_1, index_1) {
tmp_vfe_var_1 = (struct vfe_var *)(void *)pboardobj_1;
BOARDOBJGRP_ITERATOR(pboardobjgrp, struct boardobj*,
pboardobj_2, index_2,
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct pmu_board_obj*,
obj_tmp_1, index_1) {
tmp_vfe_var_1 = (struct vfe_var *)(void *)obj_tmp_1;
BOARDOBJGRP_ITERATOR(pboardobjgrp, struct pmu_board_obj*,
obj_tmp_2, index_2,
&tmp_vfe_var_1->mask_depending_vars.super) {
tmp_vfe_var_2 = (struct vfe_var *)(void *)pboardobj_2;
tmp_vfe_var_2 = (struct vfe_var *)(void *)obj_tmp_2;
status = nvgpu_boardobjgrpmask_bit_set(
&tmp_vfe_var_2->mask_dependent_vars.super,
index_1);
@@ -297,8 +297,8 @@ done:
}
static int vfe_var_pmudatainit_super(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct vfe_var *pvfe_var;
@@ -306,13 +306,13 @@ static int vfe_var_pmudatainit_super(struct gk20a *g,
nvgpu_log_info(g, " ");
status = nvgpu_boardobj_pmu_data_init_super(g, board_obj_ptr, ppmudata);
status = pmu_board_obj_pmu_data_init_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pvfe_var = (struct vfe_var *)(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var *)(void *)ppmudata;
pvfe_var = (struct vfe_var *)(void *)obj;
pset = (struct nv_pmu_vfe_var *)(void *)pmu_obj;
pset->out_range_min = pvfe_var->out_range_min;
pset->out_range_max = pvfe_var->out_range_max;
@@ -337,7 +337,7 @@ static int vfe_var_build_depending_mask_null(struct gk20a *g,
}
static int vfe_var_construct_super(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct vfe_var *pvfevar;
@@ -349,13 +349,13 @@ static int vfe_var_construct_super(struct gk20a *g,
return -ENOMEM;
}
status = pmu_boardobj_construct_super(g,
(struct boardobj *)(void *)pvfevar, pargs);
status = pmu_board_obj_construct_super(g,
(struct pmu_board_obj *)(void *)pvfevar, pargs);
if (status != 0) {
return -EINVAL;
}
*ppboardobj = (struct boardobj *)(void *)pvfevar;
*obj = (struct pmu_board_obj *)(void *)pvfevar;
pvfevar->super.pmudatainit =
vfe_var_pmudatainit_super;
@@ -383,27 +383,27 @@ static int vfe_var_construct_super(struct gk20a *g,
}
static int vfe_var_pmudatainit_derived(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
return vfe_var_pmudatainit_super(g, board_obj_ptr, ppmudata);
return vfe_var_pmudatainit_super(g, obj, pmu_obj);
}
static int vfe_var_construct_derived(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
int status = 0;
struct vfe_var_derived *pvfevar;
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_DERIVED);
status = vfe_var_construct_super(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_DERIVED);
status = vfe_var_construct_super(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_derived *)(void *)*ppboardobj;
pvfevar = (struct vfe_var_derived *)(void *)*obj;
pvfevar->super.super.pmudatainit =
vfe_var_pmudatainit_derived;
@@ -412,8 +412,8 @@ static int vfe_var_construct_derived(struct gk20a *g,
}
static int vfe_var_pmudatainit_derived_product(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct vfe_var_derived_product *pvfe_var_derived_product;
@@ -421,14 +421,14 @@ static int vfe_var_pmudatainit_derived_product(struct gk20a *g,
nvgpu_log_info(g, " ");
status = vfe_var_pmudatainit_derived(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_derived(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pvfe_var_derived_product =
(struct vfe_var_derived_product *)(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var_derived_product *)(void *)ppmudata;
(struct vfe_var_derived_product *)(void *)obj;
pset = (struct nv_pmu_vfe_var_derived_product *)(void *)pmu_obj;
pset->var_idx0 = pvfe_var_derived_product->var_idx0;
pset->var_idx1 = pvfe_var_derived_product->var_idx1;
@@ -472,26 +472,26 @@ static int vfe_var_build_depending_mask_derived_product(struct gk20a *g,
}
static int vfe_var_construct_derived_product(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct vfe_var_derived_product *pvfevar;
struct vfe_var_derived_product *ptmpvar =
(struct vfe_var_derived_product *)pargs;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_DERIVED_PRODUCT) {
if (pmu_board_obj_get_type(pargs) != CTRL_PERF_VFE_VAR_TYPE_DERIVED_PRODUCT) {
return -EINVAL;
}
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_DERIVED_PRODUCT);
status = vfe_var_construct_derived(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_DERIVED_PRODUCT);
status = vfe_var_construct_derived(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_derived_product *)(void *)*ppboardobj;
pvfevar = (struct vfe_var_derived_product *)(void *)*obj;
pvfevar->super.super.mask_depending_build =
vfe_var_build_depending_mask_derived_product;
pvfevar->super.super.super.pmudatainit =
@@ -505,21 +505,21 @@ static int vfe_var_construct_derived_product(struct gk20a *g,
}
static int vfe_var_pmudatainit_derived_sum(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct vfe_var_derived_sum *pvfe_var_derived_sum;
struct nv_pmu_vfe_var_derived_sum *pset;
status = vfe_var_pmudatainit_derived(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_derived(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pvfe_var_derived_sum = (struct vfe_var_derived_sum *)
(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var_derived_sum *)(void *)ppmudata;
(void *)obj;
pset = (struct nv_pmu_vfe_var_derived_sum *)(void *)pmu_obj;
pset->var_idx0 = pvfe_var_derived_sum->var_idx0;
pset->var_idx1 = pvfe_var_derived_sum->var_idx1;
@@ -563,26 +563,26 @@ static int vfe_var_build_depending_mask_derived_sum(struct gk20a *g,
}
static int vfe_var_construct_derived_sum(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct vfe_var_derived_sum *pvfevar;
struct vfe_var_derived_sum *ptmpvar =
(struct vfe_var_derived_sum *)pargs;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_DERIVED_SUM) {
if (pmu_board_obj_get_type(pargs) != CTRL_PERF_VFE_VAR_TYPE_DERIVED_SUM) {
return -EINVAL;
}
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_DERIVED_SUM);
status = vfe_var_construct_derived(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_DERIVED_SUM);
status = vfe_var_construct_derived(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_derived_sum *)(void *)*ppboardobj;
pvfevar = (struct vfe_var_derived_sum *)(void *)*obj;
pvfevar->super.super.mask_depending_build =
vfe_var_build_depending_mask_derived_sum;
pvfevar->super.super.super.pmudatainit =
@@ -595,21 +595,21 @@ static int vfe_var_construct_derived_sum(struct gk20a *g,
}
static int vfe_var_pmudatainit_single(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct vfe_var_single *pvfe_var_single;
struct nv_pmu_vfe_var_single *pset;
status = vfe_var_pmudatainit_super(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pvfe_var_single = (struct vfe_var_single *)(void *)board_obj_ptr;
pvfe_var_single = (struct vfe_var_single *)(void *)obj;
pset = (struct nv_pmu_vfe_var_single *)(void *)
ppmudata;
pmu_obj;
pset->override_type = pvfe_var_single->override_type;
pset->override_value = pvfe_var_single->override_value;
@@ -618,18 +618,18 @@ static int vfe_var_pmudatainit_single(struct gk20a *g,
}
static int vfe_var_pmudatainit_single_frequency(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct vfe_var_single_frequency *pvfe_var_single_frequency;
struct nv_pmu_vfe_var_single_frequency *pset;
status = vfe_var_pmudatainit_single(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_single(g, obj, pmu_obj);
pvfe_var_single_frequency = (struct vfe_var_single_frequency *)
(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var_single_frequency *)(void *)ppmudata;
(void *)obj;
pset = (struct nv_pmu_vfe_var_single_frequency *)(void *)pmu_obj;
pset->clk_domain_idx = pvfe_var_single_frequency->clk_domain_idx;
@@ -646,19 +646,19 @@ static int vfe_var_build_depending_mask_single(struct gk20a *g,
}
static int vfe_var_construct_single(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pargs)
struct pmu_board_obj **obj, size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct vfe_var_single *pvfevar;
int status = 0;
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE);
status = vfe_var_construct_super(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE);
status = vfe_var_construct_super(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_single *)(void *)*ppboardobj;
pvfevar = (struct vfe_var_single *)(void *)*obj;
pvfevar->super.mask_depending_build =
vfe_var_build_depending_mask_single;
pvfevar->super.super.pmudatainit =
@@ -673,26 +673,26 @@ static int vfe_var_construct_single(struct gk20a *g,
}
static int vfe_var_construct_single_frequency(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct vfe_var_single_frequency *pvfevar;
struct vfe_var_single_frequency *ptmpvar =
(struct vfe_var_single_frequency *)pargs;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY) {
if (pmu_board_obj_get_type(pargs) != CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY) {
return -EINVAL;
}
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY);
status = vfe_var_construct_single(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY);
status = vfe_var_construct_single(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_single_frequency *)(void *)*ppboardobj;
pvfevar = (struct vfe_var_single_frequency *)(void *)*obj;
pvfevar->super.super.mask_depending_build =
vfe_var_build_depending_mask_single;
pvfevar->super.super.super.pmudatainit =
@@ -707,20 +707,20 @@ static int vfe_var_construct_single_frequency(struct gk20a *g,
}
static int vfe_var_pmudatainit_single_caller_specified(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct vfe_var_single_caller_specified
*pvfe_var_single_caller_specified;
struct nv_pmu_vfe_var_single_caller_specified *pset;
status = vfe_var_pmudatainit_single(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_single(g, obj, pmu_obj);
pvfe_var_single_caller_specified =
(struct vfe_var_single_caller_specified *)(void *)board_obj_ptr;
(struct vfe_var_single_caller_specified *)(void *)obj;
pset = (struct nv_pmu_vfe_var_single_caller_specified *)
(void *)ppmudata;
(void *)pmu_obj;
pset->uid = pvfe_var_single_caller_specified->uid;
@@ -728,26 +728,26 @@ static int vfe_var_pmudatainit_single_caller_specified(struct gk20a *g,
}
static int vfe_var_construct_single_caller_specified(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct vfe_var_single_caller_specified *pvfevar;
struct vfe_var_single_caller_specified *ptmpvar =
(struct vfe_var_single_caller_specified *)pargs;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY) {
if (pmu_board_obj_get_type(pargs) != CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY) {
return -EINVAL;
}
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY);
status = vfe_var_construct_single(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY);
status = vfe_var_construct_single(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_single_caller_specified *)(void *)*ppboardobj;
pvfevar = (struct vfe_var_single_caller_specified *)(void *)*obj;
pvfevar->super.super.super.pmudatainit =
vfe_var_pmudatainit_single_caller_specified;
@@ -761,30 +761,30 @@ static int vfe_var_construct_single_caller_specified(struct gk20a *g,
}
static int vfe_var_pmudatainit_single_sensed(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
return vfe_var_pmudatainit_single(g, board_obj_ptr, ppmudata);
return vfe_var_pmudatainit_single(g, obj, pmu_obj);
}
static int vfe_var_pmudatainit_single_sensed_fuse(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct vfe_var_single_sensed_fuse *pvfe_var_single_sensed_fuse;
struct nv_pmu_vfe_var_single_sensed_fuse *pset;
status = vfe_var_pmudatainit_single_sensed(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_single_sensed(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pvfe_var_single_sensed_fuse =
(struct vfe_var_single_sensed_fuse *)(void *)board_obj_ptr;
(struct vfe_var_single_sensed_fuse *)(void *)obj;
pset = (struct nv_pmu_vfe_var_single_sensed_fuse *)(void *)
ppmudata;
pmu_obj;
nvgpu_memcpy((u8 *)&pset->vfield_info,
(u8 *)&pvfe_var_single_sensed_fuse->vfield_info,
@@ -803,20 +803,20 @@ static int vfe_var_pmudatainit_single_sensed_fuse(struct gk20a *g,
}
static int vfe_var_construct_single_sensed(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct vfe_var_single_sensed *pvfevar;
int status = 0;
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED);
status = vfe_var_construct_single(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED);
status = vfe_var_construct_single(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_single_sensed *)(void *)*ppboardobj;
pvfevar = (struct vfe_var_single_sensed *)(void *)*obj;
pvfevar->super.super.super.pmudatainit =
vfe_var_pmudatainit_single_sensed;
@@ -827,26 +827,26 @@ static int vfe_var_construct_single_sensed(struct gk20a *g,
}
static int vfe_var_construct_single_sensed_fuse(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct vfe_var_single_sensed_fuse *pvfevar;
struct vfe_var_single_sensed_fuse *ptmpvar =
(struct vfe_var_single_sensed_fuse *)pargs;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_FUSE) {
if (pmu_board_obj_get_type(pargs) != CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_FUSE) {
return -EINVAL;
}
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_FUSE);
status = vfe_var_construct_single_sensed(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_FUSE);
status = vfe_var_construct_single_sensed(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_single_sensed_fuse *)(void *)*ppboardobj;
pvfevar = (struct vfe_var_single_sensed_fuse *)(void *)*obj;
pvfevar->super.super.super.super.pmudatainit =
vfe_var_pmudatainit_single_sensed_fuse;
@@ -892,30 +892,30 @@ static int vfe_var_construct_single_sensed_fuse(struct gk20a *g,
}
exit:
if (status != 0) {
(*ppboardobj)->destruct(*ppboardobj);
(*obj)->destruct(*obj);
}
return status;
}
static int vfe_var_pmudatainit_single_sensed_temp(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct vfe_var_single_sensed_temp *pvfe_var_single_sensed_temp;
struct nv_pmu_vfe_var_single_sensed_temp *pset;
status = vfe_var_pmudatainit_single_sensed(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_single_sensed(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pvfe_var_single_sensed_temp =
(struct vfe_var_single_sensed_temp *)(void *)board_obj_ptr;
(struct vfe_var_single_sensed_temp *)(void *)obj;
pset = (struct nv_pmu_vfe_var_single_sensed_temp *)(void *)
ppmudata;
pmu_obj;
pset->therm_channel_index =
pvfe_var_single_sensed_temp->therm_channel_index;
pset->temp_hysteresis_positive =
@@ -928,26 +928,26 @@ static int vfe_var_pmudatainit_single_sensed_temp(struct gk20a *g,
}
static int vfe_var_construct_single_sensed_temp(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct vfe_var_single_sensed_temp *pvfevar;
struct vfe_var_single_sensed_temp *ptmpvar =
(struct vfe_var_single_sensed_temp *)pargs;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_TEMP) {
if (pmu_board_obj_get_type(pargs) != CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_TEMP) {
return -EINVAL;
}
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_TEMP);
status = vfe_var_construct_single_sensed(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_TEMP);
status = vfe_var_construct_single_sensed(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_single_sensed_temp *)(void *)*ppboardobj;
pvfevar = (struct vfe_var_single_sensed_temp *)(void *)*obj;
pvfevar->super.super.super.super.pmudatainit =
vfe_var_pmudatainit_single_sensed_temp;
@@ -967,31 +967,31 @@ static int vfe_var_construct_single_sensed_temp(struct gk20a *g,
}
static int vfe_var_pmudatainit_single_voltage(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
return vfe_var_pmudatainit_single(g, board_obj_ptr, ppmudata);
return vfe_var_pmudatainit_single(g, obj, pmu_obj);
}
static int vfe_var_construct_single_voltage(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)pargs;
struct vfe_var_single_voltage *pvfevar;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_SINGLE_VOLTAGE) {
if (pmu_board_obj_get_type(pargs) != CTRL_PERF_VFE_VAR_TYPE_SINGLE_VOLTAGE) {
return -EINVAL;
}
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_VOLTAGE);
status = vfe_var_construct_super(g, ppboardobj, size, pargs);
obj_tmp->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_VOLTAGE);
status = vfe_var_construct_super(g, obj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_single_voltage *)(void *)*ppboardobj;
pvfevar = (struct vfe_var_single_voltage *)(void *)*obj;
pvfevar->super.super.mask_depending_build =
vfe_var_build_depending_mask_single;
pvfevar->super.super.super.pmudatainit =
@@ -1005,42 +1005,42 @@ static int vfe_var_construct_single_voltage(struct gk20a *g,
static struct vfe_var *construct_vfe_var(struct gk20a *g, void *pargs)
{
struct boardobj *board_obj_ptr = NULL;
struct pmu_board_obj *obj = NULL;
int status;
switch (BOARDOBJ_GET_TYPE(pargs)) {
switch (pmu_board_obj_get_type(pargs)) {
case CTRL_PERF_VFE_VAR_TYPE_DERIVED_PRODUCT:
status = vfe_var_construct_derived_product(g, &board_obj_ptr,
status = vfe_var_construct_derived_product(g, &obj,
sizeof(struct vfe_var_derived_product), pargs);
break;
case CTRL_PERF_VFE_VAR_TYPE_DERIVED_SUM:
status = vfe_var_construct_derived_sum(g, &board_obj_ptr,
status = vfe_var_construct_derived_sum(g, &obj,
sizeof(struct vfe_var_derived_sum), pargs);
break;
case CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY:
status = vfe_var_construct_single_frequency(g, &board_obj_ptr,
status = vfe_var_construct_single_frequency(g, &obj,
sizeof(struct vfe_var_single_frequency), pargs);
break;
case CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_FUSE:
status = vfe_var_construct_single_sensed_fuse(g, &board_obj_ptr,
status = vfe_var_construct_single_sensed_fuse(g, &obj,
sizeof(struct vfe_var_single_sensed_fuse), pargs);
break;
case CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_TEMP:
status = vfe_var_construct_single_sensed_temp(g, &board_obj_ptr,
status = vfe_var_construct_single_sensed_temp(g, &obj,
sizeof(struct vfe_var_single_sensed_temp), pargs);
break;
case CTRL_PERF_VFE_VAR_TYPE_SINGLE_VOLTAGE:
status = vfe_var_construct_single_voltage(g, &board_obj_ptr,
status = vfe_var_construct_single_voltage(g, &obj,
sizeof(struct vfe_var_single_voltage), pargs);
break;
case CTRL_PERF_VFE_VAR_TYPE_SINGLE_CALLER_SPECIFIED:
status = vfe_var_construct_single_caller_specified(g, &board_obj_ptr,
status = vfe_var_construct_single_caller_specified(g, &obj,
sizeof(struct vfe_var_single_caller_specified), pargs);
break;
@@ -1058,7 +1058,7 @@ static struct vfe_var *construct_vfe_var(struct gk20a *g, void *pargs)
nvgpu_log_info(g, "done");
return (struct vfe_var *)board_obj_ptr;
return (struct vfe_var *)(void *)obj;
}
static int devinit_get_vfe_var_table(struct gk20a *g,
@@ -1080,7 +1080,7 @@ static int devinit_get_vfe_var_table(struct gk20a *g,
VBIOS_VFE_3X_VAR_ENTRY_PAR0_SFREQ_CLK_DOMAIN_IS_AVAILABLE_NO;
union {
struct boardobj board_obj;
struct pmu_board_obj obj;
struct vfe_var super;
struct vfe_var_derived_product derived_product;
struct vfe_var_derived_sum derived_sum;
@@ -1253,8 +1253,8 @@ static int devinit_get_vfe_var_table(struct gk20a *g,
goto done;
}
var_data.board_obj.type = var_type;
var_data.board_obj.type_mask = 0;
var_data.obj.type = var_type;
var_data.obj.type_mask = 0;
pvar = construct_vfe_var(g, &var_data);
if (pvar == NULL) {
@@ -1266,7 +1266,7 @@ static int devinit_get_vfe_var_table(struct gk20a *g,
}
status = boardobjgrp_objinsert(&pvfevarobjs->super.super,
(struct boardobj *)pvar, index);
(struct pmu_board_obj *)pvar, index);
if (status != 0) {
nvgpu_err(g, "error adding vfe_var boardobj %d", index);
status = -EINVAL;
@@ -1285,7 +1285,7 @@ static int vfe_var_boardobj_grp_get_status(struct gk20a *g)
struct boardobjgrp *pboardobjgrp;
struct boardobjgrpmask *pboardobjgrpmask;
struct nv_pmu_boardobjgrp_super *pboardobjgrppmu;
struct boardobj *pboardobj = NULL;
struct pmu_board_obj *obj = NULL;
struct nv_pmu_boardobj_query *pboardobjpmustatus = NULL;
struct vfe_var_single_sensed_fuse *single_sensed_fuse = NULL;
int status;
@@ -1302,9 +1302,9 @@ static int vfe_var_boardobj_grp_get_status(struct gk20a *g)
pboardobjgrppmu = pboardobjgrp->pmu.getstatus.buf;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) {
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct pmu_board_obj*, obj, index) {
single_sensed_fuse = (struct vfe_var_single_sensed_fuse *)
(void *)pboardobj;
(void *)obj;
status = pboardobjgrp->pmustatusinstget(g,
(struct nv_pmu_boardobjgrp *)(void *)pboardobjgrppmu,
&pboardobjpmustatus, index);
@@ -1408,7 +1408,7 @@ int perf_vfe_var_pmu_setup(struct gk20a *g)
int nvgpu_pmu_perf_vfe_get_s_param(struct gk20a *g, u64 *s_param)
{
struct boardobjgrp *pboardobjgrp;
struct boardobj *pboardobj = NULL;
struct pmu_board_obj *obj = NULL;
struct vfe_var_single_sensed_fuse *single_sensed_fuse = NULL;
u8 index;
int status;
@@ -1421,9 +1421,9 @@ int nvgpu_pmu_perf_vfe_get_s_param(struct gk20a *g, u64 *s_param)
pboardobjgrp = &g->pmu->perf_pmu->vfe_varobjs.super.super;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) {
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct pmu_board_obj*, obj, index) {
single_sensed_fuse = (struct vfe_var_single_sensed_fuse *)
(void *)pboardobj;
(void *)obj;
if (single_sensed_fuse->vfield_info.v_field_id ==
VFIELD_ID_S_PARAM) {
*s_param = single_sensed_fuse->fuse_value_hw_integer;

2
drivers/gpu/nvgpu/common/pmu/perf/vfe_var.h
View File

@@ -29,7 +29,7 @@ struct vfe_vars {
};
struct vfe_var {
struct boardobj super;
struct pmu_board_obj super;
u32 out_range_min;
u32 out_range_max;
struct boardobjgrpmask_e32 mask_depending_vars;

5
drivers/gpu/nvgpu/common/pmu/pmgr/pmgrpmu.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -355,7 +355,8 @@ static int pmgr_send_pwr_policy_to_pmu(struct gk20a *g)
ppwrpack->policies.hdr.data.super.obj_mask.super.data[0]) {
ppolicy = PMGR_GET_PWR_POLICY(g, indx);
status = ((struct boardobj *)ppolicy)->pmudatainit(g, (struct boardobj *)ppolicy,
status = ((struct pmu_board_obj *)(void *)ppolicy)->pmudatainit(
g, (struct pmu_board_obj *)ppolicy,
(struct nv_pmu_boardobj *)&(ppwrpack->policies.policies[indx].data));
if (status != 0) {
nvgpu_err(g, "pmudatainit failed %x indx %x",

52
drivers/gpu/nvgpu/common/pmu/pmgr/pwrdev.c
View File

@@ -31,7 +31,7 @@
static int _pwr_device_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata,
struct nv_pmu_boardobj **pmu_obj,
u8 idx)
{
struct nv_pmu_pmgr_pwr_device_desc_table *ppmgrdevice =
@@ -45,8 +45,8 @@ static int _pwr_device_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
&ppmgrdevice->devices[idx].data.board_obj;
*pmu_obj = (struct nv_pmu_boardobj *)
&ppmgrdevice->devices[idx].data.obj;
nvgpu_log_info(g, " Done");
@@ -54,15 +54,15 @@ static int _pwr_device_pmudata_instget(struct gk20a *g,
}
static int _pwr_domains_pmudatainit_ina3221(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
struct nv_pmu_pmgr_pwr_device_desc_ina3221 *ina3221_desc;
struct pwr_device_ina3221 *ina3221;
int status = 0;
u32 indx;
status = nvgpu_boardobj_pmu_data_init_super(g, board_obj_ptr, ppmudata);
status = pmu_board_obj_pmu_data_init_super(g, obj, pmu_obj);
if (status != 0) {
nvgpu_err(g,
"error updating pmu boardobjgrp for pwr domain 0x%x",
@@ -70,8 +70,9 @@ static int _pwr_domains_pmudatainit_ina3221(struct gk20a *g,
goto done;
}
ina3221 = (struct pwr_device_ina3221 *)board_obj_ptr;
ina3221_desc = (struct nv_pmu_pmgr_pwr_device_desc_ina3221 *) ppmudata;
ina3221 = (struct pwr_device_ina3221 *)(void *)obj;
ina3221_desc = (struct nv_pmu_pmgr_pwr_device_desc_ina3221 *)
(void *) pmu_obj;
ina3221_desc->super.power_corr_factor = ina3221->super.power_corr_factor;
ina3221_desc->i2c_dev_idx = ina3221->super.i2c_dev_idx;
@@ -90,10 +91,10 @@ done:
return status;
}
static struct boardobj *construct_pwr_device(struct gk20a *g,
static struct pmu_board_obj *construct_pwr_device(struct gk20a *g,
void *pargs, size_t pargs_size, u8 type)
{
struct boardobj *board_obj_ptr = NULL;
struct pmu_board_obj *obj = NULL;
int status;
u32 indx;
struct pwr_device_ina3221 *pwrdev;
@@ -103,17 +104,19 @@ static struct boardobj *construct_pwr_device(struct gk20a *g,
if (pwrdev == NULL) {
return NULL;
}
board_obj_ptr = (struct boardobj *)(void *)pwrdev;
obj = (struct pmu_board_obj *)(void *)pwrdev;
status = pmu_boardobj_construct_super(g, board_obj_ptr, pargs);
status = pmu_board_obj_construct_super(g, obj, pargs);
if (status != 0) {
return NULL;
}
pwrdev = (struct pwr_device_ina3221*)(void *)board_obj_ptr;
obj = (struct pmu_board_obj *)(void *)pwrdev;
/* Set Super class interfaces */
board_obj_ptr->pmudatainit = _pwr_domains_pmudatainit_ina3221;
obj->pmudatainit = _pwr_domains_pmudatainit_ina3221;
pwrdev = (struct pwr_device_ina3221 *)(void *)obj;
pwrdev->super.power_rail = ina3221->super.power_rail;
pwrdev->super.i2c_dev_idx = ina3221->super.i2c_dev_idx;
pwrdev->super.power_corr_factor = BIT32(12);
@@ -132,7 +135,7 @@ static struct boardobj *construct_pwr_device(struct gk20a *g,
nvgpu_log_info(g, " Done");
return board_obj_ptr;
return obj;
}
static int devinit_get_pwr_device_table(struct gk20a *g,
@@ -141,14 +144,14 @@ static int devinit_get_pwr_device_table(struct gk20a *g,
int status = 0;
u8 *pwr_device_table_ptr = NULL;
u8 *curr_pwr_device_table_ptr = NULL;
struct boardobj *boardobj;
struct pmu_board_obj *obj_tmp;
struct pwr_sensors_2x_header pwr_sensor_table_header = { 0 };
struct pwr_sensors_2x_entry pwr_sensor_table_entry = { 0 };
u32 index;
u32 obj_index = 0;
size_t pwr_device_size;
union {
struct boardobj boardobj;
struct pmu_board_obj obj;
struct pwr_device pwrdev;
struct pwr_device_ina3221 ina3221;
} pwr_device_data;
@@ -263,21 +266,22 @@ static int devinit_get_pwr_device_table(struct gk20a *g,
continue;
}
pwr_device_data.boardobj.type = CTRL_PMGR_PWR_DEVICE_TYPE_INA3221;
pwr_device_data.obj.type = CTRL_PMGR_PWR_DEVICE_TYPE_INA3221;
pwr_device_data.pwrdev.power_rail = (u8)0;
boardobj = construct_pwr_device(g, &pwr_device_data,
pwr_device_size, pwr_device_data.boardobj.type);
obj_tmp = construct_pwr_device(g, &pwr_device_data,
pwr_device_size, pwr_device_data.obj.type);
if (boardobj == NULL) {
if (obj_tmp == NULL) {
nvgpu_err(g,
"unable to create pwr device for %d type %d", index, pwr_device_data.boardobj.type);
"unable to create pwr device for %d type %d", index,
pwr_device_data.obj.type);
status = -EINVAL;
goto done;
}
status = boardobjgrp_objinsert(&ppwrdeviceobjs->super.super,
boardobj, obj_index);
obj_tmp, obj_index);
if (status != 0) {
nvgpu_err(g,

2
drivers/gpu/nvgpu/common/pmu/pmgr/pwrdev.h
View File

@@ -34,7 +34,7 @@
#define PWR_DEVICE_PROV_NUM_DEFAULT 1
struct pwr_device {
struct boardobj super;
struct pmu_board_obj super;
u8 power_rail;
u8 i2c_dev_idx;
bool bIs_inforom_config;

56
drivers/gpu/nvgpu/common/pmu/pmgr/pwrmonitor.c
View File

@@ -31,7 +31,7 @@
static int _pwr_channel_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata,
struct nv_pmu_boardobj **pmu_obj,
u8 idx)
{
struct nv_pmu_pmgr_pwr_channel_desc *ppmgrchannel =
@@ -45,8 +45,8 @@ static int _pwr_channel_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
&ppmgrchannel->channels[idx].data.board_obj;
*pmu_obj = (struct nv_pmu_boardobj *)
&ppmgrchannel->channels[idx].data.obj;
/* handle Global/common data here as we need index */
ppmgrchannel->channels[idx].data.channel.ch_idx = idx;
@@ -58,7 +58,7 @@ static int _pwr_channel_pmudata_instget(struct gk20a *g,
static int _pwr_channel_rels_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata,
struct nv_pmu_boardobj **pmu_obj,
u8 idx)
{
struct nv_pmu_pmgr_pwr_chrelationship_desc *ppmgrchrels =
@@ -72,8 +72,8 @@ static int _pwr_channel_rels_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
&ppmgrchrels->ch_rels[idx].data.board_obj;
*pmu_obj = (struct nv_pmu_boardobj *)
&ppmgrchrels->ch_rels[idx].data.obj;
nvgpu_log_info(g, " Done");
@@ -105,18 +105,19 @@ static int _pwr_channel_state_init(struct gk20a *g)
static bool _pwr_channel_implements(struct pwr_channel *pchannel,
u8 type)
{
return (type == BOARDOBJ_GET_TYPE(pchannel));
return (type == pmu_board_obj_get_type((struct pmu_board_obj *)
(void *)pchannel));
}
static int _pwr_domains_pmudatainit_sensor(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
struct nv_pmu_pmgr_pwr_channel_sensor *pmu_sensor_data;
struct pwr_channel_sensor *sensor;
int status = 0;
status = nvgpu_boardobj_pmu_data_init_super(g, board_obj_ptr, ppmudata);
status = pmu_board_obj_pmu_data_init_super(g, obj, pmu_obj);
if (status != 0) {
nvgpu_err(g,
"error updating pmu boardobjgrp for pwr sensor 0x%x",
@@ -124,8 +125,9 @@ static int _pwr_domains_pmudatainit_sensor(struct gk20a *g,
goto done;
}
sensor = (struct pwr_channel_sensor *)board_obj_ptr;
pmu_sensor_data = (struct nv_pmu_pmgr_pwr_channel_sensor *) ppmudata;
sensor = (struct pwr_channel_sensor *)(void *)obj;
pmu_sensor_data = (struct nv_pmu_pmgr_pwr_channel_sensor *)
(void *) pmu_obj;
pmu_sensor_data->super.pwr_rail = sensor->super.pwr_rail;
pmu_sensor_data->super.volt_fixedu_v = sensor->super.volt_fixed_uv;
@@ -143,10 +145,10 @@ done:
return status;
}
static struct boardobj *construct_pwr_topology(struct gk20a *g,
static struct pmu_board_obj *construct_pwr_topology(struct gk20a *g,
void *pargs, size_t pargs_size, u8 type)
{
struct boardobj *board_obj_ptr = NULL;
struct pmu_board_obj *obj = NULL;
int status;
struct pwr_channel_sensor *pwrchannel;
struct pwr_channel_sensor *sensor = (struct pwr_channel_sensor*)pargs;
@@ -155,17 +157,17 @@ static struct boardobj *construct_pwr_topology(struct gk20a *g,
if (pwrchannel == NULL) {
return NULL;
}
board_obj_ptr = (struct boardobj *)(void *)pwrchannel;
obj = (struct pmu_board_obj *)(void *)pwrchannel;
status = pmu_boardobj_construct_super(g, board_obj_ptr, pargs);
status = pmu_board_obj_construct_super(g, obj, pargs);
if (status != 0) {
return NULL;
}
pwrchannel = (struct pwr_channel_sensor*)board_obj_ptr;
pwrchannel = (struct pwr_channel_sensor *)(void *)obj;
/* Set Super class interfaces */
board_obj_ptr->pmudatainit = _pwr_domains_pmudatainit_sensor;
obj->pmudatainit = _pwr_domains_pmudatainit_sensor;
pwrchannel->super.pwr_rail = sensor->super.pwr_rail;
pwrchannel->super.volt_fixed_uv = sensor->super.volt_fixed_uv;
@@ -180,7 +182,7 @@ static struct boardobj *construct_pwr_topology(struct gk20a *g,
nvgpu_log_info(g, " Done");
return board_obj_ptr;
return obj;
}
static int devinit_get_pwr_topology_table(struct gk20a *g,
@@ -189,14 +191,14 @@ static int devinit_get_pwr_topology_table(struct gk20a *g,
int status = 0;
u8 *pwr_topology_table_ptr = NULL;
u8 *curr_pwr_topology_table_ptr = NULL;
struct boardobj *boardobj;
struct pmu_board_obj *obj_tmp;
struct pwr_topology_2x_header pwr_topology_table_header;
struct pwr_topology_2x_entry pwr_topology_table_entry;
u32 index;
u32 obj_index = 0;
size_t pwr_topology_size;
union {
struct boardobj boardobj;
struct pmu_board_obj obj;
struct pwr_channel pwrchannel;
struct pwr_channel_sensor sensor;
} pwr_topology_data;
@@ -274,7 +276,7 @@ static int devinit_get_pwr_topology_table(struct gk20a *g,
}
/* Initialize data for the parent class */
pwr_topology_data.boardobj.type = CTRL_PMGR_PWR_CHANNEL_TYPE_SENSOR;
pwr_topology_data.obj.type = CTRL_PMGR_PWR_CHANNEL_TYPE_SENSOR;
pwr_topology_data.pwrchannel.pwr_rail = (u8)pwr_topology_table_entry.pwr_rail;
pwr_topology_data.pwrchannel.volt_fixed_uv = pwr_topology_table_entry.param0;
pwr_topology_data.pwrchannel.pwr_corr_slope = BIT32(12);
@@ -284,19 +286,19 @@ static int devinit_get_pwr_topology_table(struct gk20a *g,
pwr_topology_data.pwrchannel.curr_corr_offset_ma =
(s32)pwr_topology_table_entry.curr_corr_offset;
boardobj = construct_pwr_topology(g, &pwr_topology_data,
pwr_topology_size, pwr_topology_data.boardobj.type);
obj_tmp = construct_pwr_topology(g, &pwr_topology_data,
pwr_topology_size, pwr_topology_data.obj.type);
if (boardobj == NULL) {
if (obj_tmp == NULL) {
nvgpu_err(g,
"unable to create pwr topology for %d type %d",
index, pwr_topology_data.boardobj.type);
index, pwr_topology_data.obj.type);
status = -EINVAL;
goto done;
}
status = boardobjgrp_objinsert(&ppwrmonitorobjs->pwr_channels.super,
boardobj, obj_index);
obj_tmp, obj_index);
if (status != 0) {
nvgpu_err(g,

4
drivers/gpu/nvgpu/common/pmu/pmgr/pwrmonitor.h
View File

@@ -30,7 +30,7 @@
#include <common/pmu/boardobj/boardobj.h>
struct pwr_channel {
struct boardobj super;
struct pmu_board_obj super;
u8 pwr_rail;
u32 volt_fixed_uv;
u32 pwr_corr_slope;
@@ -41,7 +41,7 @@ struct pwr_channel {
};
struct pwr_chrelationship {
struct boardobj super;
struct pmu_board_obj super;
u8 chIdx;
};

65
drivers/gpu/nvgpu/common/pmu/pmgr/pwrpolicy.c
View File

@@ -184,8 +184,8 @@ static u32 _pwr_policy_limitarboutputget(struct gk20a *g,
}
static int _pwr_domains_pmudatainit_hw_threshold(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
struct nv_pmu_pmgr_pwr_policy_hw_threshold *pmu_hw_threshold_data;
struct pwr_policy_hw_threshold *p_hw_threshold;
@@ -193,7 +193,7 @@ static int _pwr_domains_pmudatainit_hw_threshold(struct gk20a *g,
struct nv_pmu_pmgr_pwr_policy *pmu_pwr_policy;
int status = 0;
status = nvgpu_boardobj_pmu_data_init_super(g, board_obj_ptr, ppmudata);
status = pmu_board_obj_pmu_data_init_super(g, obj, pmu_obj);
if (status != 0) {
nvgpu_err(g,
"error updating pmu boardobjgrp for pwr sensor 0x%x",
@@ -202,9 +202,9 @@ static int _pwr_domains_pmudatainit_hw_threshold(struct gk20a *g,
goto done;
}
p_hw_threshold = (struct pwr_policy_hw_threshold *)board_obj_ptr;
pmu_hw_threshold_data = (struct nv_pmu_pmgr_pwr_policy_hw_threshold *) ppmudata;
pmu_pwr_policy = (struct nv_pmu_pmgr_pwr_policy *) ppmudata;
p_hw_threshold = (struct pwr_policy_hw_threshold *)(void *)obj;
pmu_hw_threshold_data = (struct nv_pmu_pmgr_pwr_policy_hw_threshold *) pmu_obj;
pmu_pwr_policy = (struct nv_pmu_pmgr_pwr_policy *) pmu_obj;
p_pwr_policy = (struct pwr_policy *)&(p_hw_threshold->super.super);
pmu_pwr_policy->ch_idx = 0;
@@ -239,14 +239,14 @@ static int _pwr_domains_pmudatainit_hw_threshold(struct gk20a *g,
pmu_hw_threshold_data->b_use_low_threshold = p_hw_threshold->b_use_low_threshold;
pmu_hw_threshold_data->low_threshold_value = p_hw_threshold->low_threshold_value;
if (BOARDOBJ_GET_TYPE(board_obj_ptr) ==
if (pmu_board_obj_get_type(obj) ==
CTRL_PMGR_PWR_POLICY_TYPE_SW_THRESHOLD) {
struct nv_pmu_pmgr_pwr_policy_sw_threshold *pmu_sw_threshold_data;
struct pwr_policy_sw_threshold *p_sw_threshold;
p_sw_threshold = (struct pwr_policy_sw_threshold *)board_obj_ptr;
p_sw_threshold = (struct pwr_policy_sw_threshold *)(void *)obj;
pmu_sw_threshold_data =
(struct nv_pmu_pmgr_pwr_policy_sw_threshold *) ppmudata;
(struct nv_pmu_pmgr_pwr_policy_sw_threshold *)(void *)pmu_obj;
pmu_sw_threshold_data->event_id =
p_sw_threshold->event_id;
}
@@ -254,10 +254,10 @@ done:
return status;
}
static struct boardobj *construct_pwr_policy(struct gk20a *g,
static struct pmu_board_obj *construct_pwr_policy(struct gk20a *g,
void *pargs, size_t pargs_size, u8 type)
{
struct boardobj *board_obj_ptr = NULL;
struct pmu_board_obj *obj = NULL;
int status;
struct pwr_policy_hw_threshold *pwrpolicyhwthreshold;
struct pwr_policy *pwrpolicy;
@@ -268,15 +268,15 @@ static struct boardobj *construct_pwr_policy(struct gk20a *g,
if (pwrpolicy == NULL) {
return NULL;
}
board_obj_ptr = (struct boardobj *)(void *)pwrpolicy;
status = pmu_boardobj_construct_super(g, board_obj_ptr, pargs);
status = pmu_board_obj_construct_super(g,
(struct pmu_board_obj *)(void *)pwrpolicy, pargs);
if (status != 0) {
return NULL;
}
pwrpolicyhwthreshold = (struct pwr_policy_hw_threshold*)board_obj_ptr;
pwrpolicy = (struct pwr_policy *)board_obj_ptr;
pwrpolicyhwthreshold = (struct pwr_policy_hw_threshold *)(void *)obj;
pwrpolicy = (struct pwr_policy *)(void *)obj;
nvgpu_log_fn(g, "min=%u rated=%u max=%u",
pwrpolicyparams->limit_min,
@@ -284,7 +284,7 @@ static struct boardobj *construct_pwr_policy(struct gk20a *g,
pwrpolicyparams->limit_max);
/* Set Super class interfaces */
board_obj_ptr->pmudatainit = _pwr_domains_pmudatainit_hw_threshold;
obj->pmudatainit = _pwr_domains_pmudatainit_hw_threshold;
pwrpolicy->ch_idx = pwrpolicyparams->ch_idx;
pwrpolicy->num_limit_inputs = 0;
@@ -364,13 +364,14 @@ static struct boardobj *construct_pwr_policy(struct gk20a *g,
struct pwr_policy_sw_threshold *swthreshold =
(struct pwr_policy_sw_threshold*)pargs;
pwrpolicyswthreshold = (struct pwr_policy_sw_threshold*)board_obj_ptr;
pwrpolicyswthreshold =
(struct pwr_policy_sw_threshold *)(void *)obj;
pwrpolicyswthreshold->event_id = swthreshold->event_id;
}
nvgpu_log_info(g, " Done");
return board_obj_ptr;
return obj;
}
static int _pwr_policy_construct_WAR_SW_Threshold_policy(struct gk20a *g,
@@ -380,7 +381,7 @@ static int _pwr_policy_construct_WAR_SW_Threshold_policy(struct gk20a *g,
u32 obj_index)
{
int status = 0;
struct boardobj *boardobj;
struct pmu_board_obj *obj_tmp;
/* WARN policy */
ppwrpolicydata->pwrpolicy.limit_unit = 0;
@@ -397,20 +398,20 @@ static int _pwr_policy_construct_WAR_SW_Threshold_policy(struct gk20a *g,
ppwrpolicydata->sw_threshold.event_id = 0x01;
ppwrpolicydata->boardobj.type = CTRL_PMGR_PWR_POLICY_TYPE_SW_THRESHOLD;
ppwrpolicydata->obj.type = CTRL_PMGR_PWR_POLICY_TYPE_SW_THRESHOLD;
boardobj = construct_pwr_policy(g, ppwrpolicydata,
pwr_policy_size, ppwrpolicydata->boardobj.type);
obj_tmp = construct_pwr_policy(g, ppwrpolicydata,
pwr_policy_size, ppwrpolicydata->obj.type);
if (boardobj == NULL) {
if (obj_tmp == NULL) {
nvgpu_err(g,
"unable to create pwr policy for type %d", ppwrpolicydata->boardobj.type);
"unable to create pwr policy for type %d", ppwrpolicydata->obj.type);
status = -EINVAL;
goto done;
}
status = boardobjgrp_objinsert(&ppwrpolicyobjs->pwr_policies.super,
boardobj, obj_index);
obj_tmp, obj_index);
if (status != 0) {
nvgpu_err(g,
@@ -527,7 +528,7 @@ static int devinit_get_pwr_policy_table(struct gk20a *g,
{
int status = 0;
u8 *ptr = NULL;
struct boardobj *boardobj;
struct pmu_board_obj *obj_tmp;
struct pwr_policy_3x_header_struct *packed_hdr;
struct pwr_policy_3x_header_unpacked hdr;
u32 index;
@@ -649,7 +650,7 @@ static int devinit_get_pwr_policy_table(struct gk20a *g,
pwr_policy_size = sizeof(struct pwr_policy_hw_threshold);
/* Initialize data for the parent class */
pwr_policy_data.boardobj.type =
pwr_policy_data.obj.type =
CTRL_PMGR_PWR_POLICY_TYPE_HW_THRESHOLD;
pwr_policy_data.pwrpolicy.ch_idx = entry.ch_idx;
pwr_policy_data.pwrpolicy.limit_unit =
@@ -675,19 +676,19 @@ static int devinit_get_pwr_policy_table(struct gk20a *g,
hw_threshold_policy_index |=
BIT32(pwr_policy_data.hw_threshold.threshold_idx);
boardobj = construct_pwr_policy(g, &pwr_policy_data,
pwr_policy_size, pwr_policy_data.boardobj.type);
obj_tmp = construct_pwr_policy(g, &pwr_policy_data,
pwr_policy_size, pwr_policy_data.obj.type);
if (boardobj == NULL) {
if (obj_tmp == NULL) {
nvgpu_err(g,
"unable to create pwr policy for %d type %d",
index, pwr_policy_data.boardobj.type);
index, pwr_policy_data.obj.type);
status = -EINVAL;
goto done;
}
status = boardobjgrp_objinsert(&ppwrpolicyobjs->pwr_policies.super,
boardobj, obj_index);
obj_tmp, obj_index);
if (status != 0) {
nvgpu_err(g,

6
drivers/gpu/nvgpu/common/pmu/pmgr/pwrpolicy.h
View File

@@ -40,7 +40,7 @@ enum pwr_policy_limit_id {
};
struct pwr_policy {
struct boardobj super;
struct pmu_board_obj super;
u8 ch_idx;
u8 num_limit_inputs;
u8 limit_unit;
@@ -76,7 +76,7 @@ struct pwr_policy_client_workitem {
};
struct pwr_policy_relationship {
struct boardobj super;
struct pmu_board_obj super;
u8 policy_idx;
};
@@ -118,7 +118,7 @@ struct pwr_policy_sw_threshold {
};
union pwr_policy_data_union {
struct boardobj boardobj;
struct pmu_board_obj obj;
struct pwr_policy pwrpolicy;
struct pwr_policy_hw_threshold hw_threshold;
struct pwr_policy_sw_threshold sw_threshold;

2
drivers/gpu/nvgpu/common/pmu/pmu.c
View File

@@ -30,8 +30,6 @@
#include <nvgpu/boardobjgrp.h>
#include <nvgpu/pmu.h>
#include "boardobj/boardobj.h"
/* PMU H/W error functions */
void nvgpu_pmu_report_bar0_pri_err_status(struct gk20a *g, u32 bar0_status,
u32 error_type)

6
drivers/gpu/nvgpu/common/pmu/pmu_rtos_init.c
View File

@@ -117,7 +117,7 @@ int nvgpu_pmu_destroy(struct gk20a *g, struct nvgpu_pmu *pmu)
static void remove_pmu_support(struct nvgpu_pmu *pmu)
{
struct gk20a *g = pmu->g;
struct boardobj *pboardobj, *pboardobj_tmp;
struct pmu_board_obj *obj, *obj_tmp;
struct boardobjgrp *pboardobjgrp, *pboardobjgrp_tmp;
int err = 0;
@@ -137,9 +137,9 @@ static void remove_pmu_support(struct nvgpu_pmu *pmu)
}
}
nvgpu_list_for_each_entry_safe(pboardobj, pboardobj_tmp,
nvgpu_list_for_each_entry_safe(obj, obj_tmp,
&g->boardobj_head, boardobj, node) {
pboardobj->destruct(pboardobj);
obj->destruct(obj);
}
}

77
drivers/gpu/nvgpu/common/pmu/therm/therm_channel.c
View File

@@ -35,15 +35,15 @@
#include "thrm.h"
static int _therm_channel_pmudatainit_device(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct therm_channel *pchannel;
struct therm_channel_device *ptherm_channel;
struct nv_pmu_therm_therm_channel_device_boardobj_set *pset;
status = nvgpu_boardobj_pmu_data_init_super(g, board_obj_ptr, ppmudata);
status = pmu_board_obj_pmu_data_init_super(g, obj, pmu_obj);
if (status != 0) {
nvgpu_err(g,
"error updating pmu boardobjgrp for therm channel 0x%x",
@@ -52,9 +52,10 @@ static int _therm_channel_pmudatainit_device(struct gk20a *g,
goto done;
}
pchannel = (struct therm_channel *)board_obj_ptr;
pset = (struct nv_pmu_therm_therm_channel_device_boardobj_set *)ppmudata;
ptherm_channel = (struct therm_channel_device *)board_obj_ptr;
pchannel = (struct therm_channel *)(void *)obj;
pset = (struct nv_pmu_therm_therm_channel_device_boardobj_set *)
(void *)pmu_obj;
ptherm_channel = (struct therm_channel_device *)(void *)obj;
pset->super.scaling = pchannel->scaling;
pset->super.offset = pchannel->offset;
@@ -67,10 +68,10 @@ static int _therm_channel_pmudatainit_device(struct gk20a *g,
done:
return status;
}
static struct boardobj *construct_channel_device(struct gk20a *g,
static struct pmu_board_obj *construct_channel_device(struct gk20a *g,
void *pargs, size_t pargs_size, u8 type)
{
struct boardobj *board_obj_ptr = NULL;
struct pmu_board_obj *obj = NULL;
struct therm_channel *pchannel;
struct therm_channel_device *pchannel_device;
int status;
@@ -81,18 +82,18 @@ static struct boardobj *construct_channel_device(struct gk20a *g,
if (pchannel_device == NULL) {
return NULL;
}
board_obj_ptr = (struct boardobj *)(void *)pchannel_device;
obj = (struct pmu_board_obj *)(void *)pchannel_device;
status = pmu_boardobj_construct_super(g, board_obj_ptr, pargs);
status = pmu_board_obj_construct_super(g, obj, pargs);
if (status != 0) {
return NULL;
}
/* Set Super class interfaces */
board_obj_ptr->pmudatainit = _therm_channel_pmudatainit_device;
obj->pmudatainit = _therm_channel_pmudatainit_device;
pchannel = (struct therm_channel *)board_obj_ptr;
pchannel_device = (struct therm_channel_device *)board_obj_ptr;
pchannel = (struct therm_channel *)(void *)obj;
pchannel_device = (struct therm_channel_device *)(void *)obj;
g->ops.therm.get_internal_sensor_limits(&pchannel->temp_max,
&pchannel->temp_min);
@@ -104,12 +105,12 @@ static struct boardobj *construct_channel_device(struct gk20a *g,
nvgpu_log_info(g, " Done");
return board_obj_ptr;
return obj;
}
static int _therm_channel_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata,
struct nv_pmu_boardobj **pmu_obj,
u8 idx)
{
struct nv_pmu_therm_therm_channel_boardobj_grp_set *pgrp_set =
@@ -124,8 +125,8 @@ static int _therm_channel_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.board_obj;
*pmu_obj = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.obj;
nvgpu_log_info(g, " Done");
@@ -134,7 +135,7 @@ static int _therm_channel_pmudata_instget(struct gk20a *g,
static int therm_channel_pmustatus_instget(struct gk20a *g,
void *pboardobjgrppmu, struct nv_pmu_boardobj_query
**ppboardobjpmustatus, u8 idx)
**obj_pmu_status, u8 idx)
{
struct nv_pmu_therm_therm_channel_boardobj_grp_get_status *pmu_status =
(struct nv_pmu_therm_therm_channel_boardobj_grp_get_status *)
@@ -146,8 +147,8 @@ static int therm_channel_pmustatus_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmustatus = (struct nv_pmu_boardobj_query *)
&pmu_status->objects[idx].data.board_obj;
*obj_pmu_status = (struct nv_pmu_boardobj_query *)
&pmu_status->objects[idx].data.obj;
return 0;
}
@@ -157,14 +158,14 @@ static int devinit_get_therm_channel_table(struct gk20a *g,
int status = 0;
u8 *therm_channel_table_ptr = NULL;
u8 *curr_therm_channel_table_ptr = NULL;
struct boardobj *boardobj;
struct pmu_board_obj *obj_tmp;
struct therm_channel_1x_header therm_channel_table_header = { 0 };
struct therm_channel_1x_entry *therm_channel_table_entry = NULL;
u32 index;
u32 obj_index = 0;
size_t therm_channel_size = 0;
union {
struct boardobj boardobj;
struct pmu_board_obj obj;
struct therm_channel therm_channel;
struct therm_channel_device device;
} therm_channel_data;
@@ -217,21 +218,21 @@ static int devinit_get_therm_channel_table(struct gk20a *g,
therm_channel_data.device.therm_dev_prov_idx = therm_channel_table_entry->param1;
therm_channel_size = sizeof(struct therm_channel_device);
therm_channel_data.boardobj.type = CTRL_THERMAL_THERM_CHANNEL_CLASS_DEVICE;
therm_channel_data.obj.type = CTRL_THERMAL_THERM_CHANNEL_CLASS_DEVICE;
boardobj = construct_channel_device(g, &therm_channel_data,
therm_channel_size, therm_channel_data.boardobj.type);
obj_tmp = construct_channel_device(g, &therm_channel_data,
therm_channel_size, therm_channel_data.obj.type);
if (boardobj == NULL) {
if (obj_tmp == NULL) {
nvgpu_err(g,
"unable to create thermal device for %d type %d",
index, therm_channel_data.boardobj.type);
index, therm_channel_data.obj.type);
status = -EINVAL;
goto done;
}
status = boardobjgrp_objinsert(&pthermchannelobjs->super.super,
boardobj, obj_index);
obj_tmp, obj_index);
if (status != 0) {
nvgpu_err(g,
@@ -302,8 +303,8 @@ done:
}
static int therm_channel_currtemp_update(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
struct therm_channel_get_status *therm_channel_obj;
struct nv_pmu_therm_therm_channel_boardobj_get_status *pstatus;
@@ -311,9 +312,9 @@ static int therm_channel_currtemp_update(struct gk20a *g,
nvgpu_log_info(g, " ");
therm_channel_obj = (struct therm_channel_get_status *)
(void *)board_obj_ptr;
(void *)obj;
pstatus = (struct nv_pmu_therm_therm_channel_boardobj_get_status *)
(void *)ppmudata;
(void *)pmu_obj;
if (pstatus->super.type != therm_channel_obj->super.type) {
nvgpu_err(g, "pmu data and boardobj type not matching");
@@ -329,7 +330,7 @@ static int therm_channel_boardobj_grp_get_status(struct gk20a *g)
struct boardobjgrp *pboardobjgrp = NULL;
struct boardobjgrpmask *pboardobjgrpmask;
struct nv_pmu_boardobjgrp_super *pboardobjgrppmu;
struct boardobj *pboardobj = NULL;
struct pmu_board_obj *obj = NULL;
struct nv_pmu_boardobj_query *pboardobjpmustatus = NULL;
int status;
u8 index;
@@ -345,7 +346,7 @@ static int therm_channel_boardobj_grp_get_status(struct gk20a *g)
}
pboardobjgrppmu = pboardobjgrp->pmu.getstatus.buf;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) {
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct pmu_board_obj*, obj, index) {
status = pboardobjgrp->pmustatusinstget(g,
(struct nv_pmu_boardobjgrp *)(void *)pboardobjgrppmu,
&pboardobjpmustatus, index);
@@ -353,7 +354,7 @@ static int therm_channel_boardobj_grp_get_status(struct gk20a *g)
nvgpu_err(g, "could not get status object instance");
return status;
}
status = therm_channel_currtemp_update(g, pboardobj,
status = therm_channel_currtemp_update(g, obj,
(struct nv_pmu_boardobj *)(void *)pboardobjpmustatus);
if (status != 0) {
nvgpu_err(g, "could not update therm_channel status");
@@ -367,7 +368,7 @@ static int therm_channel_boardobj_grp_get_status(struct gk20a *g)
int nvgpu_pmu_therm_channel_get_curr_temp(struct gk20a *g, u32 *temp)
{
struct boardobjgrp *pboardobjgrp;
struct boardobj *pboardobj = NULL;
struct pmu_board_obj *obj = NULL;
struct therm_channel_get_status *therm_channel_status = NULL;
int status;
u8 index;
@@ -380,9 +381,9 @@ int nvgpu_pmu_therm_channel_get_curr_temp(struct gk20a *g, u32 *temp)
pboardobjgrp = &g->pmu->therm_pmu->therm_channelobjs.super.super;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) {
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct pmu_board_obj*, obj, index) {
therm_channel_status = (struct therm_channel_get_status *)
(void *)pboardobj;
(void *)obj;
if (therm_channel_status->curr_temp != 0U) {
*temp = therm_channel_status->curr_temp;
return status;

4
drivers/gpu/nvgpu/common/pmu/therm/therm_channel.h
View File

@@ -28,7 +28,7 @@
#include <common/pmu/boardobj/boardobj.h>
struct therm_channel {
struct boardobj super;
struct pmu_board_obj super;
s16 scaling;
s16 offset;
s32 temp_min;
@@ -46,7 +46,7 @@ struct therm_channel_device {
};
struct therm_channel_get_status {
struct boardobj super;
struct pmu_board_obj super;
u32 curr_temp;
};

46
drivers/gpu/nvgpu/common/pmu/therm/therm_dev.c
View File

@@ -40,7 +40,7 @@ bool therm_device_idx_is_valid(struct nvgpu_pmu_therm *therm_pmu, u8 idx)
static int _therm_device_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata,
struct nv_pmu_boardobj **pmu_obj,
u8 idx)
{
struct nv_pmu_therm_therm_device_boardobj_grp_set *pgrp_set =
@@ -55,7 +55,7 @@ static int _therm_device_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
*pmu_obj = (struct nv_pmu_boardobj *)(void *)
&pgrp_set->objects[idx].data;
nvgpu_log_info(g, " Done");
@@ -64,21 +64,21 @@ static int _therm_device_pmudata_instget(struct gk20a *g,
}
static int construct_therm_device(struct gk20a *g,
struct boardobj *ppboardobj, void *pargs)
struct pmu_board_obj *obj, void *pargs)
{
return pmu_boardobj_construct_super(g, ppboardobj, pargs);
return pmu_board_obj_construct_super(g, obj, pargs);
}
static int construct_therm_device_gpu(struct gk20a *g,
struct boardobj *ppboardobj, void *pargs)
struct pmu_board_obj *obj, void *pargs)
{
return construct_therm_device(g, ppboardobj, pargs);
return construct_therm_device(g, obj, pargs);
}
static struct boardobj *therm_device_construct(struct gk20a *g,
static struct pmu_board_obj *therm_device_construct(struct gk20a *g,
void *pargs)
{
struct boardobj *board_obj_ptr = NULL;
struct pmu_board_obj *obj = NULL;
struct therm_device *ptherm_device = NULL;
int status = 0;
@@ -86,28 +86,28 @@ static struct boardobj *therm_device_construct(struct gk20a *g,
if (ptherm_device == NULL) {
return NULL;
}
board_obj_ptr = (struct boardobj *)(void *)ptherm_device;
obj = (struct pmu_board_obj *)(void *)ptherm_device;
if (BOARDOBJ_GET_TYPE(pargs) ==
if (pmu_board_obj_get_type(pargs) ==
NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_GPU) {
status = construct_therm_device_gpu(g, board_obj_ptr, pargs);
status = construct_therm_device_gpu(g, obj, pargs);
} else {
nvgpu_err(g, "unsupported therm_device class - 0x%x",
BOARDOBJ_GET_TYPE(pargs));
pmu_board_obj_get_type(pargs));
return NULL;
}
if(status != 0) {
board_obj_ptr = NULL;
obj = NULL;
nvgpu_err(g,
"could not allocate memory for therm_device");
if (board_obj_ptr != NULL) {
nvgpu_kfree(g, board_obj_ptr);
if (obj != NULL) {
nvgpu_kfree(g, obj);
}
}
return board_obj_ptr;
return obj;
}
static int devinit_get_therm_device_table(struct gk20a *g,
@@ -116,7 +116,7 @@ static int devinit_get_therm_device_table(struct gk20a *g,
int status = 0;
u8 *therm_device_table_ptr = NULL;
u8 *curr_therm_device_table_ptr = NULL;
struct boardobj *boardobj;
struct pmu_board_obj *obj_tmp;
struct therm_device_1x_header therm_device_table_header = { 0 };
struct therm_device_1x_entry *therm_device_table_entry = NULL;
u32 index;
@@ -124,7 +124,7 @@ static int devinit_get_therm_device_table(struct gk20a *g,
u8 class_id = 0;
bool error_status = false;
union {
struct boardobj boardobj;
struct pmu_board_obj obj;
struct therm_device therm_device;
} therm_device_data;
@@ -188,18 +188,18 @@ static int devinit_get_therm_device_table(struct gk20a *g,
goto done;
}
therm_device_data.boardobj.type = class_id;
boardobj = therm_device_construct(g, &therm_device_data);
if (boardobj == NULL) {
therm_device_data.obj.type = class_id;
obj_tmp = therm_device_construct(g, &therm_device_data);
if (obj_tmp == NULL) {
nvgpu_err(g,
"unable to create thermal device for %d type %d",
index, therm_device_data.boardobj.type);
index, therm_device_data.obj.type);
status = -EINVAL;
goto done;
}
status = boardobjgrp_objinsert(&pthermdeviceobjs->super.super,
boardobj, obj_index);
obj_tmp, obj_index);
if (status != 0) {
nvgpu_err(g,

2
drivers/gpu/nvgpu/common/pmu/therm/therm_dev.h
View File

@@ -34,7 +34,7 @@ struct therm_devices {
};
struct therm_device {
struct boardobj super;
struct pmu_board_obj super;
};
int therm_device_sw_setup(struct gk20a *g);

6
drivers/gpu/nvgpu/common/pmu/therm/ucode_therm_inf.h
View File

@@ -63,7 +63,7 @@ struct nv_pmu_therm_therm_device_hbm2_combined_boardobj_set {
};
union nv_pmu_therm_therm_device_boardobj_set_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_therm_therm_device_boardobj_set device;
struct nv_pmu_therm_therm_device_gpu_gpc_tsosc_boardobj_set
gpu_gpc_tsosc;
@@ -95,7 +95,7 @@ struct nv_pmu_therm_therm_channel_device_boardobj_set {
};
union nv_pmu_therm_therm_channel_boardobj_set_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_therm_therm_channel_boardobj_set channel;
struct nv_pmu_therm_therm_channel_device_boardobj_set device;
};
@@ -114,7 +114,7 @@ struct nv_pmu_therm_therm_channel_boardobj_get_status
union nv_pmu_therm_therm_channel_boardobj_get_status_union
{
struct nv_pmu_boardobj_query board_obj;
struct nv_pmu_boardobj_query obj;
struct nv_pmu_therm_therm_channel_boardobj_get_status therm_channel;
};

8
drivers/gpu/nvgpu/common/pmu/volt/ucode_volt_inf.h
View File

@@ -46,7 +46,7 @@ struct nv_pmu_volt_volt_rail_boardobj_set {
};
union nv_pmu_volt_volt_rail_boardobj_set_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_volt_volt_rail_boardobj_set super;
};
@@ -83,7 +83,7 @@ struct nv_pmu_volt_volt_device_pwm_boardobj_set {
};
union nv_pmu_volt_volt_device_boardobj_set_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_volt_volt_device_boardobj_set super;
struct nv_pmu_volt_volt_device_vid_boardobj_set vid;
struct nv_pmu_volt_volt_device_pwm_boardobj_set pwm;
@@ -133,7 +133,7 @@ struct nv_pmu_volt_volt_policy_srss_boardobj_set {
};
union nv_pmu_volt_volt_policy_boardobj_set_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_volt_volt_policy_boardobj_set super;
struct nv_pmu_volt_volt_policy_sr_boardobj_set single_rail;
struct nv_pmu_volt_volt_policy_sr_multi_step_boardobj_set
@@ -165,7 +165,7 @@ struct nv_pmu_volt_volt_rail_boardobj_get_status {
};
union nv_pmu_volt_volt_rail_boardobj_get_status_union {
struct nv_pmu_boardobj_query board_obj;
struct nv_pmu_boardobj_query obj;
struct nv_pmu_volt_volt_rail_boardobj_get_status super;
};

58
drivers/gpu/nvgpu/common/pmu/volt/volt_dev.c
View File

@@ -39,19 +39,19 @@
#include "volt_rail.h"
static int volt_device_pmu_data_init_super(struct gk20a *g,
struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj, struct nv_pmu_boardobj *pmu_obj)
{
int status;
struct voltage_device *pdev;
struct nv_pmu_volt_volt_device_boardobj_set *pset;
status = nvgpu_boardobj_pmu_data_init_super(g, pboard_obj, ppmudata);
status = pmu_board_obj_pmu_data_init_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pdev = (struct voltage_device *)pboard_obj;
pset = (struct nv_pmu_volt_volt_device_boardobj_set *)ppmudata;
pdev = (struct voltage_device *)(void *)obj;
pset = (struct nv_pmu_volt_volt_device_boardobj_set *)(void *)pmu_obj;
pset->switch_delay_us = pdev->switch_delay_us;
pset->voltage_min_uv = pdev->voltage_min_uv;
@@ -62,19 +62,19 @@ static int volt_device_pmu_data_init_super(struct gk20a *g,
}
static int volt_device_pmu_data_init_pwm(struct gk20a *g,
struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj, struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct voltage_device_pwm *pdev;
struct nv_pmu_volt_volt_device_pwm_boardobj_set *pset;
status = volt_device_pmu_data_init_super(g, pboard_obj, ppmudata);
status = volt_device_pmu_data_init_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
pdev = (struct voltage_device_pwm *)pboard_obj;
pset = (struct nv_pmu_volt_volt_device_pwm_boardobj_set *)ppmudata;
pdev = (struct voltage_device_pwm *)(void *)obj;
pset = (struct nv_pmu_volt_volt_device_pwm_boardobj_set *)(void *)pmu_obj;
pset->raw_period = pdev->raw_period;
pset->voltage_base_uv = pdev->voltage_base_uv;
@@ -85,7 +85,7 @@ static int volt_device_pmu_data_init_pwm(struct gk20a *g,
}
static int volt_construct_volt_device(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pargs)
struct pmu_board_obj **obj, size_t size, void *pargs)
{
struct voltage_device *ptmp_dev = (struct voltage_device *)pargs;
struct voltage_device *pvolt_dev = NULL;
@@ -96,13 +96,13 @@ static int volt_construct_volt_device(struct gk20a *g,
return -ENOMEM;
}
status = pmu_boardobj_construct_super(g,
(struct boardobj *)(void *)pvolt_dev, pargs);
status = pmu_board_obj_construct_super(g,
(struct pmu_board_obj *)(void *)pvolt_dev, pargs);
if (status != 0) {
return -EINVAL;
}
*ppboardobj = (struct boardobj *)(void *)pvolt_dev;
*obj = (struct pmu_board_obj *)(void *)pvolt_dev;
pvolt_dev->volt_domain = ptmp_dev->volt_domain;
pvolt_dev->i2c_dev_idx = ptmp_dev->i2c_dev_idx;
@@ -120,24 +120,24 @@ static int volt_construct_volt_device(struct gk20a *g,
}
static int volt_construct_pwm_volt_device(struct gk20a *g,
struct boardobj **ppboardobj,
struct pmu_board_obj **obj,
size_t size, void *pargs)
{
struct boardobj *pboard_obj = NULL;
struct pmu_board_obj *obj_tmp = NULL;
struct voltage_device_pwm *ptmp_dev =
(struct voltage_device_pwm *)pargs;
struct voltage_device_pwm *pdev = NULL;
int status = 0;
status = volt_construct_volt_device(g, ppboardobj, size, pargs);
status = volt_construct_volt_device(g, obj, size, pargs);
if (status != 0) {
return status;
}
pboard_obj = (*ppboardobj);
pdev = (struct voltage_device_pwm *)*ppboardobj;
obj_tmp = (*obj);
pdev = (struct voltage_device_pwm *)(void *)*obj;
pboard_obj->pmudatainit = volt_device_pmu_data_init_pwm;
obj_tmp->pmudatainit = volt_device_pmu_data_init_pwm;
/* Set VOLTAGE_DEVICE_PWM-specific parameters */
pdev->voltage_base_uv = ptmp_dev->voltage_base_uv;
@@ -185,20 +185,20 @@ static u8 volt_dev_operation_type_convert(u8 vbios_type)
static struct voltage_device *volt_volt_device_construct(struct gk20a *g,
void *pargs)
{
struct boardobj *pboard_obj = NULL;
struct pmu_board_obj *obj = NULL;
if (BOARDOBJ_GET_TYPE(pargs) == CTRL_VOLT_DEVICE_TYPE_PWM) {
int status = volt_construct_pwm_volt_device(g, &pboard_obj,
if (pmu_board_obj_get_type(pargs) == CTRL_VOLT_DEVICE_TYPE_PWM) {
int status = volt_construct_pwm_volt_device(g, &obj,
sizeof(struct voltage_device_pwm), pargs);
if (status != 0) {
nvgpu_err(g,
" Could not allocate memory for VOLTAGE_DEVICE type (%x).",
BOARDOBJ_GET_TYPE(pargs));
pboard_obj = NULL;
pmu_board_obj_get_type(pargs));
obj = NULL;
}
}
return (struct voltage_device *)pboard_obj;
return (struct voltage_device *)(void *)obj;
}
static int volt_get_voltage_device_table_1x_psv(struct gk20a *g,
@@ -316,7 +316,7 @@ static int volt_get_voltage_device_table_1x_psv(struct gk20a *g,
status = boardobjgrp_objinsert(
&p_Volt_Device_Meta_Data->volt_devices.super,
(struct boardobj *)pvolt_dev, entry_Idx);
(struct pmu_board_obj *)pvolt_dev, entry_Idx);
if (status != 0) {
nvgpu_err(g,
"could not add VOLTAGE_DEVICE for entry %d into boardobjgrp ",
@@ -424,7 +424,7 @@ done:
static int volt_device_devgrp_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx)
struct nv_pmu_boardobj **pmu_obj, u8 idx)
{
struct nv_pmu_volt_volt_device_boardobj_grp_set *pgrp_set =
(struct nv_pmu_volt_volt_device_boardobj_grp_set *)
@@ -438,8 +438,8 @@ static int volt_device_devgrp_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.board_obj;
*pmu_obj = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.obj;
nvgpu_log_info(g, "Done");
return 0;
}
@@ -483,7 +483,7 @@ static int volt_device_state_init(struct gk20a *g,
}
status = volt_rail_volt_dev_register(g, pRail,
BOARDOBJ_GET_IDX(pvolt_dev), pvolt_dev->operation_type);
pmu_board_obj_get_idx(pvolt_dev), pvolt_dev->operation_type);
if (status != 0) {
nvgpu_err(g,
"Failed to register the device with rail obj");

2
drivers/gpu/nvgpu/common/pmu/volt/volt_dev.h
View File

@@ -35,7 +35,7 @@
#define VOLT_DEV_PWM_VOLTAGE_STEPS_DEFAULT 1U
struct voltage_device {
struct boardobj super;
struct pmu_board_obj super;
u8 volt_domain;
u8 i2c_dev_idx;
u32 switch_delay_us;

87
drivers/gpu/nvgpu/common/pmu/volt/volt_policy.c
View File

@@ -34,13 +34,13 @@
#include "volt_policy.h"
static int volt_policy_pmu_data_init_super(struct gk20a *g,
struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj, struct nv_pmu_boardobj *pmu_obj)
{
return nvgpu_boardobj_pmu_data_init_super(g, pboardobj, ppmudata);
return pmu_board_obj_pmu_data_init_super(g, obj, pmu_obj);
}
static int volt_construct_volt_policy(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pArgs)
struct pmu_board_obj **obj, size_t size, void *pArgs)
{
struct voltage_policy *pvolt_policy = NULL;
int status = 0;
@@ -50,13 +50,13 @@ static int volt_construct_volt_policy(struct gk20a *g,
return -ENOMEM;
}
status = pmu_boardobj_construct_super(g,
(struct boardobj *)(void *)pvolt_policy, pArgs);
status = pmu_board_obj_construct_super(g,
(struct pmu_board_obj *)(void *)pvolt_policy, pArgs);
if (status != 0) {
return -EINVAL;
}
*ppboardobj = (struct boardobj *)(void *)pvolt_policy;
*obj = (struct pmu_board_obj *)(void *)pvolt_policy;
pvolt_policy->super.pmudatainit = volt_policy_pmu_data_init_super;
@@ -64,19 +64,19 @@ static int volt_construct_volt_policy(struct gk20a *g,
}
static int volt_construct_volt_policy_single_rail(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pArgs)
struct pmu_board_obj **obj, size_t size, void *pArgs)
{
struct voltage_policy_single_rail *ptmp_policy =
(struct voltage_policy_single_rail *)pArgs;
struct voltage_policy_single_rail *pvolt_policy = NULL;
int status = 0;
status = volt_construct_volt_policy(g, ppboardobj, size, pArgs);
status = volt_construct_volt_policy(g, obj, size, pArgs);
if (status != 0) {
return status;
}
pvolt_policy = (struct voltage_policy_single_rail *)*ppboardobj;
pvolt_policy = (struct voltage_policy_single_rail *)(void *)*obj;
pvolt_policy->rail_idx = ptmp_policy->rail_idx;
@@ -84,20 +84,20 @@ static int volt_construct_volt_policy_single_rail(struct gk20a *g,
}
static int volt_policy_pmu_data_init_single_rail(struct gk20a *g,
struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj, struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct voltage_policy_single_rail *ppolicy;
struct nv_pmu_volt_volt_policy_sr_boardobj_set *pset;
status = volt_policy_pmu_data_init_super(g, pboardobj, ppmudata);
status = volt_policy_pmu_data_init_super(g, obj, pmu_obj);
if (status != 0) {
goto done;
}
ppolicy = (struct voltage_policy_single_rail *)pboardobj;
pset = (struct nv_pmu_volt_volt_policy_sr_boardobj_set *)
ppmudata;
ppolicy = (struct voltage_policy_single_rail *)(void *)obj;
pset = (struct nv_pmu_volt_volt_policy_sr_boardobj_set *)(void *)
pmu_obj;
pset->rail_idx = ppolicy->rail_idx;
done:
@@ -105,37 +105,37 @@ done:
}
static int volt_construct_volt_policy_single(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pArgs)
struct pmu_board_obj **obj, size_t size, void *pArgs)
{
struct boardobj *pboardobj = NULL;
struct pmu_board_obj *obj_tmp = NULL;
int status = 0;
status = volt_construct_volt_policy_single_rail(g, ppboardobj, size, pArgs);
status = volt_construct_volt_policy_single_rail(g, obj, size, pArgs);
if (status != 0x0) {
return status;
}
pboardobj = *ppboardobj;
pboardobj->pmudatainit = volt_policy_pmu_data_init_single_rail;
obj_tmp = *obj;
obj_tmp->pmudatainit = volt_policy_pmu_data_init_single_rail;
return status;
}
static int volt_policy_pmu_data_init_sr_multi_step(struct gk20a *g,
struct boardobj *pboardobj, struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj, struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct voltage_policy_single_rail_multi_step *ppolicy;
struct nv_pmu_volt_volt_policy_sr_multi_step_boardobj_set *pset;
status = volt_policy_pmu_data_init_single_rail(g, pboardobj, ppmudata);
status = volt_policy_pmu_data_init_single_rail(g, obj, pmu_obj);
if (status != 0) {
goto done;
}
ppolicy = (struct voltage_policy_single_rail_multi_step *)pboardobj;
ppolicy = (struct voltage_policy_single_rail_multi_step *)(void *)obj;
pset = (struct nv_pmu_volt_volt_policy_sr_multi_step_boardobj_set *)
ppmudata;
(void *)pmu_obj;
pset->ramp_up_step_size_uv = ppolicy->ramp_up_step_size_uv;
pset->ramp_down_step_size_uv = ppolicy->ramp_down_step_size_uv;
@@ -146,24 +146,24 @@ done:
}
static int volt_construct_volt_policy_single_rail_multi_step(struct gk20a *g,
struct boardobj **ppboardobj, size_t size, void *pargs)
struct pmu_board_obj **obj, size_t size, void *pargs)
{
struct boardobj *pboardobj = NULL;
struct pmu_board_obj *obj_tmp = NULL;
struct voltage_policy_single_rail_multi_step *p_volt_policy = NULL;
struct voltage_policy_single_rail_multi_step *tmp_policy =
(struct voltage_policy_single_rail_multi_step *)pargs;
int status = 0;
status = volt_construct_volt_policy_single_rail(g, ppboardobj, size, pargs);
status = volt_construct_volt_policy_single_rail(g, obj, size, pargs);
if (status != 0) {
return status;
}
pboardobj = (*ppboardobj);
obj_tmp = (*obj);
p_volt_policy = (struct voltage_policy_single_rail_multi_step *)
*ppboardobj;
*obj;
pboardobj->pmudatainit = volt_policy_pmu_data_init_sr_multi_step;
obj_tmp->pmudatainit = volt_policy_pmu_data_init_sr_multi_step;
p_volt_policy->ramp_up_step_size_uv =
tmp_policy->ramp_up_step_size_uv;
@@ -177,35 +177,32 @@ static int volt_construct_volt_policy_single_rail_multi_step(struct gk20a *g,
static struct voltage_policy *volt_volt_policy_construct(struct gk20a *g, void *pargs)
{
struct boardobj *pboard_obj = NULL;
struct pmu_board_obj *obj = NULL;
int status = 0;
switch (BOARDOBJ_GET_TYPE(pargs)) {
switch (pmu_board_obj_get_type(pargs)) {
case CTRL_VOLT_POLICY_TYPE_SINGLE_RAIL_MULTI_STEP:
status = volt_construct_volt_policy_single_rail_multi_step(g,
&pboard_obj,
sizeof(struct voltage_policy_single_rail_multi_step),
&obj, sizeof(struct voltage_policy_single_rail_multi_step),
pargs);
if (status != 0) {
nvgpu_err(g,
"Could not allocate memory for voltage_policy");
pboard_obj = NULL;
obj = NULL;
}
break;
case CTRL_VOLT_POLICY_TYPE_SINGLE_RAIL:
status = volt_construct_volt_policy_single(g,
&pboard_obj,
sizeof(struct voltage_policy_single_rail),
pargs);
&obj, sizeof(struct voltage_policy_single_rail), pargs);
if (status != 0) {
nvgpu_err(g,
"Could not allocate memory for voltage_policy");
pboard_obj = NULL;
obj = NULL;
}
break;
}
return (struct voltage_policy *)pboard_obj;
return (struct voltage_policy *)(void *)obj;
}
static u8 volt_policy_type_convert(u8 vbios_type)
@@ -232,7 +229,7 @@ static int volt_get_volt_policy_table(struct gk20a *g,
u8 policy_type = 0;
u8 *entry_offset;
union policy_type {
struct boardobj board_obj;
struct pmu_board_obj obj;
struct voltage_policy volt_policy;
struct voltage_policy_single_rail_multi_step single_rail_ms;
struct voltage_policy_single_rail single_rail;
@@ -286,7 +283,7 @@ static int volt_get_volt_policy_table(struct gk20a *g,
break;
}
policy_type_data.board_obj.type = policy_type;
policy_type_data.obj.type = policy_type;
ppolicy = volt_volt_policy_construct(g,
(void *)&policy_type_data);
@@ -299,7 +296,7 @@ static int volt_get_volt_policy_table(struct gk20a *g,
status = boardobjgrp_objinsert(
&pvolt_policy_metadata->volt_policies.super,
(struct boardobj *)ppolicy, i);
(struct pmu_board_obj *)ppolicy, i);
if (status != 0) {
nvgpu_err(g,
"could not add volt_policy for entry %d into boardobjgrp ",
@@ -313,7 +310,7 @@ done:
}
static int volt_policy_devgrp_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx)
struct nv_pmu_boardobj **pmu_obj, u8 idx)
{
struct nv_pmu_volt_volt_policy_boardobj_grp_set *pgrp_set =
(struct nv_pmu_volt_volt_policy_boardobj_grp_set *)
@@ -327,8 +324,8 @@ static int volt_policy_devgrp_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.board_obj;
*pmu_obj = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.obj;
nvgpu_log_info(g, " Done");
return 0;
}

2
drivers/gpu/nvgpu/common/pmu/volt/volt_policy.h
View File

@@ -32,7 +32,7 @@
* extends boardobj providing attributes common to all voltage_policies.
*/
struct voltage_policy {
struct boardobj super;
struct pmu_board_obj super;
};
struct voltage_policy_single_rail {

73
drivers/gpu/nvgpu/common/pmu/volt/volt_rail.c
View File

@@ -70,7 +70,7 @@ static int volt_rail_state_init(struct gk20a *g,
}
static int volt_rail_init_pmudata_super(struct gk20a *g,
struct boardobj *board_obj_ptr, struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj, struct nv_pmu_boardobj *pmu_obj)
{
int status = 0;
struct voltage_rail *prail;
@@ -79,14 +79,14 @@ static int volt_rail_init_pmudata_super(struct gk20a *g,
nvgpu_log_info(g, " ");
status = nvgpu_boardobj_pmu_data_init_super(g, board_obj_ptr, ppmudata);
status = pmu_board_obj_pmu_data_init_super(g, obj, pmu_obj);
if (status != 0) {
return status;
}
prail = (struct voltage_rail *)board_obj_ptr;
rail_pmu_data = (struct nv_pmu_volt_volt_rail_boardobj_set *)
ppmudata;
prail = (struct voltage_rail *)(void *)obj;
rail_pmu_data = (struct nv_pmu_volt_volt_rail_boardobj_set *)(void *)
pmu_obj;
rail_pmu_data->rel_limit_vfe_equ_idx = prail->rel_limit_vfe_equ_idx;
rail_pmu_data->alt_rel_limit_vfe_equ_idx =
@@ -121,7 +121,7 @@ static int volt_rail_init_pmudata_super(struct gk20a *g,
static struct voltage_rail *volt_construct_volt_rail(struct gk20a *g, void *pargs)
{
struct boardobj *board_obj_ptr = NULL;
struct pmu_board_obj *obj = NULL;
struct voltage_rail *ptemp_rail = (struct voltage_rail *)pargs;
struct voltage_rail *board_obj_volt_rail_ptr = NULL;
int status;
@@ -133,15 +133,16 @@ static struct voltage_rail *volt_construct_volt_rail(struct gk20a *g, void *parg
return NULL;
}
status = pmu_boardobj_construct_super(g,
(struct boardobj *)(void *)board_obj_volt_rail_ptr, pargs);
status = pmu_board_obj_construct_super(g,
(struct pmu_board_obj *)(void *)board_obj_volt_rail_ptr,
pargs);
if (status != 0) {
return NULL;
}
board_obj_ptr = (struct boardobj *)(void *)board_obj_volt_rail_ptr;
obj = (struct pmu_board_obj *)(void *)board_obj_volt_rail_ptr;
/* override super class interface */
board_obj_ptr->pmudatainit = volt_rail_init_pmudata_super;
obj->pmudatainit = volt_rail_init_pmudata_super;
board_obj_volt_rail_ptr->boot_voltage_uv =
ptemp_rail->boot_voltage_uv;
@@ -164,7 +165,7 @@ static struct voltage_rail *volt_construct_volt_rail(struct gk20a *g, void *parg
nvgpu_log_info(g, "Done");
return (struct voltage_rail *)board_obj_ptr;
return (struct voltage_rail *)(void *)obj;
}
static int volt_get_volt_rail_table(struct gk20a *g,
@@ -179,7 +180,7 @@ static int volt_get_volt_rail_table(struct gk20a *g,
u8 volt_domain;
u8 *entry_ptr;
union rail_type {
struct boardobj board_obj;
struct pmu_board_obj obj;
struct voltage_rail volt_rail;
} rail_type_data;
@@ -211,7 +212,7 @@ static int volt_get_volt_rail_table(struct gk20a *g,
continue;
}
rail_type_data.board_obj.type = volt_domain;
rail_type_data.obj.type = volt_domain;
rail_type_data.volt_rail.boot_voltage_uv =
(u32)entry.boot_voltage_uv;
rail_type_data.volt_rail.rel_limit_vfe_equ_idx =
@@ -270,7 +271,7 @@ static int volt_get_volt_rail_table(struct gk20a *g,
status = boardobjgrp_objinsert(
&pvolt_rail_metadata->volt_rails.super,
(void *)(struct boardobj *)prail, i);
(void *)(struct pmu_board_obj *)prail, i);
}
done:
@@ -279,7 +280,7 @@ done:
static int volt_rail_devgrp_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp, struct nv_pmu_boardobj
**ppboardobjpmudata, u8 idx)
**pmu_obj, u8 idx)
{
struct nv_pmu_volt_volt_rail_boardobj_grp_set *pgrp_set =
(struct nv_pmu_volt_volt_rail_boardobj_grp_set *)
@@ -293,15 +294,15 @@ static int volt_rail_devgrp_pmudata_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmudata = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.board_obj;
*pmu_obj = (struct nv_pmu_boardobj *)
&pgrp_set->objects[idx].data.obj;
nvgpu_log_info(g, " Done");
return 0;
}
static int volt_rail_devgrp_pmustatus_instget(struct gk20a *g,
void *pboardobjgrppmu, struct nv_pmu_boardobj_query
**ppboardobjpmustatus, u8 idx)
**obj_pmu_status, u8 idx)
{
struct nv_pmu_volt_volt_rail_boardobj_grp_get_status *pgrp_get_status =
(struct nv_pmu_volt_volt_rail_boardobj_grp_get_status *)
@@ -313,23 +314,23 @@ static int volt_rail_devgrp_pmustatus_instget(struct gk20a *g,
return -EINVAL;
}
*ppboardobjpmustatus = (struct nv_pmu_boardobj_query *)
&pgrp_get_status->objects[idx].data.board_obj;
*obj_pmu_status = (struct nv_pmu_boardobj_query *)
&pgrp_get_status->objects[idx].data.obj;
return 0;
}
static int volt_rail_obj_update(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
struct pmu_board_obj *obj,
struct nv_pmu_boardobj *pmu_obj)
{
struct voltage_rail *volt_rail_obj;
struct nv_pmu_volt_volt_rail_boardobj_get_status *pstatus;
nvgpu_log_info(g, " ");
volt_rail_obj = (struct voltage_rail *)(void *)board_obj_ptr;
volt_rail_obj = (struct voltage_rail *)(void *)obj;
pstatus = (struct nv_pmu_volt_volt_rail_boardobj_get_status *)
(void *)ppmudata;
(void *)pmu_obj;
if (pstatus->super.type != volt_rail_obj->super.type) {
nvgpu_err(g, "pmu data and boardobj type not matching");
@@ -349,7 +350,7 @@ static int volt_rail_boardobj_grp_get_status(struct gk20a *g)
struct boardobjgrp *pboardobjgrp;
struct boardobjgrpmask *pboardobjgrpmask;
struct nv_pmu_boardobjgrp_super *pboardobjgrppmu;
struct boardobj *pboardobj = NULL;
struct pmu_board_obj *obj = NULL;
struct nv_pmu_boardobj_query *pboardobjpmustatus = NULL;
int status;
u8 index;
@@ -365,7 +366,7 @@ static int volt_rail_boardobj_grp_get_status(struct gk20a *g)
}
pboardobjgrppmu = pboardobjgrp->pmu.getstatus.buf;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) {
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct pmu_board_obj*, obj, index) {
status = pboardobjgrp->pmustatusinstget(g,
(struct nv_pmu_boardobjgrp *)(void *)pboardobjgrppmu,
&pboardobjpmustatus, index);
@@ -373,7 +374,7 @@ static int volt_rail_boardobj_grp_get_status(struct gk20a *g)
nvgpu_err(g, "could not get status object instance");
return status;
}
status = volt_rail_obj_update(g, pboardobj,
status = volt_rail_obj_update(g, obj,
(struct nv_pmu_boardobj *)(void *)pboardobjpmustatus);
if (status != 0) {
nvgpu_err(g, "could not update volt rail status");
@@ -545,7 +546,7 @@ u8 nvgpu_pmu_volt_rail_volt_domain_convert_to_idx(struct gk20a *g, u8 volt_domai
int nvgpu_pmu_volt_get_vmin_vmax_ps35(struct gk20a *g, u32 *vmin_uv, u32 *vmax_uv)
{
struct boardobjgrp *pboardobjgrp;
struct boardobj *pboardobj = NULL;
struct pmu_board_obj *obj = NULL;
struct voltage_rail *volt_rail = NULL;
int status;
u8 index;
@@ -558,8 +559,8 @@ int nvgpu_pmu_volt_get_vmin_vmax_ps35(struct gk20a *g, u32 *vmin_uv, u32 *vmax_u
pboardobjgrp = &g->pmu->volt->volt_metadata->volt_rail_metadata.volt_rails.super;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) {
volt_rail = (struct voltage_rail *)(void *)pboardobj;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct pmu_board_obj*, obj, index) {
volt_rail = (struct voltage_rail *)(void *)obj;
if ((volt_rail->vmin_limitu_v != 0U) &&
(volt_rail->max_limitu_v != 0U)) {
*vmin_uv = volt_rail->vmin_limitu_v;
@@ -574,7 +575,7 @@ int nvgpu_pmu_volt_get_vmin_vmax_ps35(struct gk20a *g, u32 *vmin_uv, u32 *vmax_u
int nvgpu_pmu_volt_get_curr_volt_ps35(struct gk20a *g, u32 *vcurr_uv)
{
struct boardobjgrp *pboardobjgrp;
struct boardobj *pboardobj = NULL;
struct pmu_board_obj *obj = NULL;
struct voltage_rail *volt_rail = NULL;
int status;
u8 index;
@@ -587,8 +588,8 @@ int nvgpu_pmu_volt_get_curr_volt_ps35(struct gk20a *g, u32 *vcurr_uv)
pboardobjgrp = &g->pmu->volt->volt_metadata->volt_rail_metadata.volt_rails.super;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj*, pboardobj, index) {
volt_rail = (struct voltage_rail *)(void *)pboardobj;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct pmu_board_obj*, obj, index) {
volt_rail = (struct voltage_rail *)(void *)obj;
if (volt_rail->current_volt_uv != 0U) {
*vcurr_uv = volt_rail->current_volt_uv;
return status;
@@ -600,14 +601,14 @@ int nvgpu_pmu_volt_get_curr_volt_ps35(struct gk20a *g, u32 *vcurr_uv)
u8 nvgpu_pmu_volt_get_vmargin_ps35(struct gk20a *g)
{
struct boardobjgrp *pboardobjgrp;
struct boardobj *pboardobj = NULL;
struct pmu_board_obj *obj = NULL;
struct voltage_rail *volt_rail = NULL;
u8 index, vmargin_uv;
pboardobjgrp = &g->pmu->volt->volt_metadata->volt_rail_metadata.volt_rails.super;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct boardobj *, pboardobj, index) {
volt_rail = (struct voltage_rail *)(void *)pboardobj;
BOARDOBJGRP_FOR_EACH(pboardobjgrp, struct pmu_board_obj *, obj, index) {
volt_rail = (struct voltage_rail *)(void *)obj;
if (volt_rail->volt_margin_limit_vfe_equ_idx != 255U) {
vmargin_uv = volt_rail->volt_margin_limit_vfe_equ_idx;
return vmargin_uv;

2
drivers/gpu/nvgpu/common/pmu/volt/volt_rail.h
View File

@@ -30,7 +30,7 @@
#define CTRL_PMGR_PWR_EQUATION_INDEX_INVALID 0xFFU
struct voltage_rail {
struct boardobj super;
struct pmu_board_obj super;
u32 boot_voltage_uv;
u8 rel_limit_vfe_equ_idx;
u8 alt_rel_limit_vfe_equ_idx;

12
drivers/gpu/nvgpu/include/nvgpu/boardobjgrp.h
View File

@@ -126,7 +126,7 @@ struct boardobjgrp {
bool bconstructed;
u8 type;
u8 classid;
struct boardobj **ppobjects;
struct pmu_board_obj **ppobjects;
struct boardobjgrpmask *mask;
u8 objslots;
u8 objmaxidx;
@@ -135,10 +135,10 @@ struct boardobjgrp {
/* Basic interfaces */
int (*destruct)(struct boardobjgrp *pboardobjgrp);
int (*objinsert)(struct boardobjgrp *pboardobjgrp,
struct boardobj *pboardobj, u8 index);
struct boardobj *(*objgetbyidx)(
struct pmu_board_obj *obj, u8 index);
struct pmu_board_obj *(*objgetbyidx)(
struct boardobjgrp *pBobrdobjgrp, u8 index);
struct boardobj *(*objgetnext)(struct boardobjgrp *pboardobjgrp,
struct pmu_board_obj *(*objgetnext)(struct boardobjgrp *pboardobjgrp,
u8 *currentindex, struct boardobjgrpmask *mask);
int (*objremoveanddestroy)(struct boardobjgrp *pboardobjgrp, u8 index);
@@ -158,9 +158,9 @@ struct boardobjgrp {
struct boardobjgrpmask *mask);
int (*pmudatainstget)(struct gk20a *g,
struct nv_pmu_boardobjgrp *boardobjgrppmu,
struct nv_pmu_boardobj **ppboardobjpmudata, u8 idx);
struct nv_pmu_boardobj **pmu_obj, u8 idx);
int (*pmustatusinstget)(struct gk20a *g, void *pboardobjgrppmu,
struct nv_pmu_boardobj_query **ppBoardobjpmustatus,
struct nv_pmu_boardobj_query **obj_pmu_status,
u8 idx);
struct nvgpu_list_node node;
};

4
drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e255.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -33,7 +33,7 @@
*/
struct boardobjgrp_e255 {
struct boardobjgrp super;
struct boardobj *objects[CTRL_BOARDOBJGRP_E255_MAX_OBJECTS];
struct pmu_board_obj *objects[CTRL_BOARDOBJGRP_E255_MAX_OBJECTS];
struct boardobjgrpmask_e255 mask;
};

4
drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e32.h
View File

@@ -37,10 +37,10 @@ struct boardobjgrp_e32 {
*/
struct boardobjgrp super;
/*
* Statically allocated array of PBOARDOBJ-s
* Statically allocated array of obj-s
*/
/* 32 will be replaced with CTRL_BOARDOBJGRP_E32_MAX_OBJECTS */
struct boardobj *objects[32];
struct pmu_board_obj *objects[32];
/*
* Statically allocated mask strcuture referenced by super::pMask.

2
drivers/gpu/nvgpu/include/nvgpu/pmu/cmd.h
View File

@@ -46,7 +46,7 @@ struct pmu_cmd {
struct pmu_pg_cmd pg;
struct pmu_zbc_cmd zbc;
struct pmu_acr_cmd acr;
struct nv_pmu_boardobj_cmd boardobj;
struct nv_pmu_boardobj_cmd obj;
struct nv_pmu_pmgr_cmd pmgr;
struct nv_pmu_rpc_cmd rpc;
} cmd;

2
drivers/gpu/nvgpu/include/nvgpu/pmu/fw.h
View File

@@ -162,7 +162,7 @@ struct pmu_fw_ver_ops {
int (*is_boardobjgrp_pmucmd_id_valid)(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct boardobjgrp_pmu_cmd *cmd);
} boardobj;
} obj;
struct {
int (*clk_set_boot_clk)(struct gk20a *g);
} clk;

2
drivers/gpu/nvgpu/include/nvgpu/pmu/msg.h
View File

@@ -65,7 +65,7 @@ struct pmu_msg {
struct pmu_pg_msg pg;
struct pmu_rc_msg rc;
struct pmu_acr_msg acr;
struct nv_pmu_boardobj_msg boardobj;
struct nv_pmu_boardobj_msg obj;
struct nv_pmu_pmgr_msg pmgr;
struct nv_pmu_rpc_msg rpc;
} msg;

12
drivers/gpu/nvgpu/include/nvgpu/pmu/pmuif/pmgr.h
View File

@@ -64,7 +64,7 @@ struct nv_pmu_pmgr_pwr_device_desc_ina3221 {
};
union nv_pmu_pmgr_pwr_device_desc_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_pmgr_pwr_device_desc pwr_dev;
struct nv_pmu_pmgr_pwr_device_desc_ina3221 ina3221;
};
@@ -122,7 +122,7 @@ struct nv_pmu_pmgr_pwr_channel_pmu_compactible {
};
union nv_pmu_pmgr_pwr_channel_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_pmgr_pwr_channel channel;
struct nv_pmu_pmgr_pwr_channel_sensor sensor;
struct nv_pmu_pmgr_pwr_channel_pmu_compactible pmu_pwr_channel;
@@ -143,7 +143,7 @@ struct nv_pmu_pmgr_pwr_chrelationship_pmu_compactible {
};
union nv_pmu_pmgr_pwr_chrelationship_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_pmgr_pwr_chrelationship_pmu_compactible
pmu_pwr_chrelationship;
};
@@ -236,7 +236,7 @@ struct nv_pmu_pmgr_pwr_policy_pmu_compactible {
};
union nv_pmu_pmgr_pwr_policy_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_pmgr_pwr_policy policy;
struct nv_pmu_pmgr_pwr_policy_hw_threshold hw_threshold;
struct nv_pmu_pmgr_pwr_policy_sw_threshold sw_threshold;
@@ -248,7 +248,7 @@ struct nv_pmu_pmgr_pwr_policy_relationship_pmu_compactible {
};
union nv_pmu_pmgr_pwr_policy_relationship_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_pmgr_pwr_policy_relationship_pmu_compactible
pmu_pwr_relationship;
};
@@ -258,7 +258,7 @@ struct nv_pmu_pmgr_pwr_violation_pmu_compactible {
};
union nv_pmu_pmgr_pwr_violation_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_boardobj obj;
struct nv_pmu_pmgr_pwr_violation_pmu_compactible violation;
};