gpu: nvgpu: fix misra errors in gr units

Fix misra errors in gr units

misra 14.3 rule - there shall be no dead code.
misra_c_2012_rule_14_3_violation: The condition
"graphics_preempt_mode != 0U" cannot be true.

misra_c_2012_rule_16_1_violation: The switch statement is not
well formed.

misra_c_2012_rule_10_8_violation: Cast from 32 bit width expression
"(regval >> 1U) & 1U" to a wider 64 bit type.

Jira NVGPU-3872

Change-Id: Ibb53d0756d464d2ae3279d1b841b3c91a16df9be
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2182562
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vinod G
2019-08-23 16:41:02 -07:00
committed by mobile promotions
parent 0a9f633fc3
commit 70a2a1bfcb
4 changed files with 18 additions and 14 deletions

View File

@@ -600,7 +600,7 @@ static int gr_falcon_recovery_bootstrap(struct gk20a *g,
err = gr_falcon_sec2_or_ls_pmu_bootstrap(g,
&bootstrap,
falcon_idmask);
if (!bootstrap) {
if ((err == 0) && (!bootstrap)) {
err = nvgpu_acr_bootstrap_hs_acr(g, g->acr);
if (err != 0) {
nvgpu_err(g,
@@ -636,7 +636,7 @@ static int gr_falcon_coldboot_bootstrap(struct gk20a *g,
err = gr_falcon_sec2_or_ls_pmu_bootstrap(g,
&bootstrap,
(u32)falcon_id_mask);
if (!bootstrap) {
if ((err == 0) && (!bootstrap)) {
/* GR falcons bootstrapped by ACR */
err = 0;
}