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Revert "gpu: nvgpu: handle falcon copy pointer alignment for misra 11.3 deviation"

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This patch reverts the following commit 13a7ef2cc7

The bios devinit for tu104 encountered the unaligned buffer scenario.
However bios devinit functionality is now removed from nvgpu. Other
than that there are no firmwares where we expect the input/output
buffer addresses to be un-aligned, hence removing the logic added
to handle un-aligned addresses.

JIRA NVGPU-3271

Change-Id: Ifd24cc5b50b9d2548878436befb2220e7bf02ed4
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2161735
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2019-07-26 11:07:04 +05:30
committed by mobile promotions
parent 77051a8c86
commit 715f29ea9f
4 changed files with 17 additions and 80 deletions
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10
drivers/gpu/nvgpu/common/utils/string.c
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@@ -77,13 +77,3 @@ int nvgpu_strnadd_u32(char *dst, const u32 value, size_t size, u32 radix)
return n;
}
bool nvgpu_mem_is_word_aligned(struct gk20a *g, u8 *addr)
{
if ((unsigned long)addr % 4UL != 0UL) {
nvgpu_log_info(g, "addr (%p) not 4-byte aligned", addr);
return false;
}
return true;
}