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gpu: nvgpu: fuse read to boot in SECURE mode

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-Read fuse to boot in secure/production
 mode else non sercure mode.

Bug N/A

Change-Id: Ia66acff63a4a5ed9351c01cd8907a337e88dc8eb
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/791323
Reviewed-on: http://git-master/r/806191
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Mahantesh Kumbar
2015-08-29 05:12:29 +05:30
committed by Deepak Nibade
parent e7ab0321d3
commit 71afbe484f
1 changed files with 38 additions and 1 deletions
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39
drivers/gpu/nvgpu/gp10b/hal_gp10b.c
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@@ -37,6 +37,10 @@
#include "gm20b/fifo_gm20b.h"
#include "gm20b/pmu_gm20b.h"
#include "gm20b/clk_gm20b.h"
#include <linux/tegra-fuse.h>
#define FUSE_OPT_PRIV_SEC_EN_0 0x264
#define PRIV_SECURITY_ENABLED 0x01
static struct gpu_ops gp10b_ops = {
.clock_gating = {
@@ -91,7 +95,40 @@ int gp10b_init_hal(struct gk20a *g)
struct nvgpu_gpu_characteristics *c = &g->gpu_characteristics;
*gops = gp10b_ops;
gops->privsecurity = 0;
#ifdef CONFIG_TEGRA_ACR
if (tegra_platform_is_linsim()) {
gops->privsecurity = 1;
gops->securegpccs = 1;
} else {
if (tegra_fuse_readl(FUSE_OPT_PRIV_SEC_EN_0) &
PRIV_SECURITY_ENABLED) {
gops->privsecurity = 1;
gops->securegpccs =1;
} else {
gk20a_dbg_info("priv security is disabled in HW");
gops->privsecurity = 0;
gops->securegpccs = 0;
}
}
#else
if (tegra_platform_is_linsim()) {
gk20a_dbg_info("running ASIM with PRIV security disabled");
gops->privsecurity = 0;
gops->securegpccs = 0;
} else {
if (tegra_fuse_readl(FUSE_OPT_PRIV_SEC_EN_0) &
PRIV_SECURITY_ENABLED) {
gk20a_dbg_info("priv security is not supported but enabled");
gops->privsecurity = 1;
gops->securegpccs =1;
return -EPERM;
} else {
gops->privsecurity = 0;
gops->securegpccs = 0;
}
}
#endif
gp10b_init_mc(gops);
gp10b_init_gr(gops);