nvrm: nvgpu_rmos: add Doxygen documentation for soc

- Add Doxygen documentation for soc.
- Add CONFIG_NVGPU_NON_FUSA flag for nvgpu_us_counter.

Jira NVGPU-4147

Change-Id: Ie0a9879a4bf681411f0efe16590370e12f7c3b70
Signed-off-by: Prateek sethi <prsethi@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2215155
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Prateek sethi
2019-10-10 22:40:46 +05:30
committed by Alex Waterman
parent 14d64640e5
commit 72e5be2690
2 changed files with 41 additions and 0 deletions

View File

@@ -31,6 +31,10 @@ struct gk20a;
* *
* @param g[in] GPU super structure. * @param g[in] GPU super structure.
* *
* - Extract out platform info by calling NvTegraSysGetPlatform().
* - If info is NULL return false.
* - If info is not "silicon" then return false. Otherwise return true.
*
* @return Returns true if it's silicon else return false. * @return Returns true if it's silicon else return false.
*/ */
bool nvgpu_platform_is_silicon(struct gk20a *g); bool nvgpu_platform_is_silicon(struct gk20a *g);
@@ -40,6 +44,14 @@ bool nvgpu_platform_is_silicon(struct gk20a *g);
* *
* @param g[in] GPU super structure. * @param g[in] GPU super structure.
* *
* - Read CPU type by calling NvTegraSysGetCpuType().
* - Read platform info by calling NvTegraSysGetPlatform().
* - If any of above two or both are NULL return false.
* - True if any/all of the below condition is true.
* - CPU type is "vdk" or
* - CPU type is "dsim" or
* - CPU type is "asim" or
* - platform info is "quickturn".
* @return Returns true if it's simulation else returns false. * @return Returns true if it's simulation else returns false.
*/ */
bool nvgpu_platform_is_simulation(struct gk20a *g); bool nvgpu_platform_is_simulation(struct gk20a *g);
@@ -49,6 +61,11 @@ bool nvgpu_platform_is_simulation(struct gk20a *g);
* *
* @param g[in] GPU super structure. * @param g[in] GPU super structure.
* *
* - Get tegra Platform info using NvTegraSysGetPlatform().
* - Return false if return info is NULL.
* - Return true if any/all of the below condition is true.
* - Info is "system_fpga" or
* - Info is "unit_fpga".
* @return Returns true if it's fpga else returns false. * @return Returns true if it's fpga else returns false.
*/ */
bool nvgpu_platform_is_fpga(struct gk20a *g); bool nvgpu_platform_is_fpga(struct gk20a *g);
@@ -58,6 +75,8 @@ bool nvgpu_platform_is_fpga(struct gk20a *g);
* *
* @param g[in] GPU super structure. * @param g[in] GPU super structure.
* *
* - Return true if NvHvCheckOsNative() is successful.
*
* @return Returns true if it's virtualized environment else returns false. * @return Returns true if it's virtualized environment else returns false.
*/ */
bool nvgpu_is_hypervisor_mode(struct gk20a *g); bool nvgpu_is_hypervisor_mode(struct gk20a *g);
@@ -76,6 +95,8 @@ bool nvgpu_is_bpmp_running(struct gk20a *g);
* *
* @param g[in] GPU super structure. * @param g[in] GPU super structure.
* *
* - Return true only if NvTegraSysGetChipId() is equal to TEGRA_CHIPID_TEGRA19
* and NvTegraSysGetChipRevision() is equal to TEGRA_REVISION_A01.
* @return Returns true if soc is t194-a01 else returns false. * @return Returns true if soc is t194-a01 else returns false.
*/ */
bool nvgpu_is_soc_t194_a01(struct gk20a *g); bool nvgpu_is_soc_t194_a01(struct gk20a *g);
@@ -85,6 +106,10 @@ bool nvgpu_is_soc_t194_a01(struct gk20a *g);
* *
* @param g[in] GPU super structure. * @param g[in] GPU super structure.
* *
* - Set VMID_UNINITIALIZED to r->gid.
* - Check if nvgpu_is_hypervisor_mode is enabled if yes then
* - If module is not virtual then set nvgpu_hv_ipa_pa to desc->phys_addr.
*
* @return Returns 0 on success or in case of failure, a suitable error code. * @return Returns 0 on success or in case of failure, a suitable error code.
*/ */
int nvgpu_init_soc_vars(struct gk20a *g); int nvgpu_init_soc_vars(struct gk20a *g);
@@ -94,9 +119,23 @@ int nvgpu_init_soc_vars(struct gk20a *g);
* *
* @param usecs[in] Delay in microseconds. * @param usecs[in] Delay in microseconds.
* *
* - Wait using nanospin_ns until usecs expires. Log error if API returns non
* zero value once wait time expires.
*
* @return None. * @return None.
*/ */
void nvgpu_delay_usecs(unsigned int usecs); void nvgpu_delay_usecs(unsigned int usecs);
#ifdef CONFIG_NVGPU_NON_FUSA
u64 nvgpu_us_counter(void); u64 nvgpu_us_counter(void);
#endif
/**
* @brief Get GPU cycles.
*
* @param None.
*
* @return 64 bit number which has GPU cycles.
*/
u64 nvgpu_get_cycles(void); u64 nvgpu_get_cycles(void);
#endif /* NVGPU_SOC_H */ #endif /* NVGPU_SOC_H */

View File

@@ -57,10 +57,12 @@ void nvgpu_delay_usecs(unsigned int usecs)
{ {
} }
#ifdef CONFIG_NVGPU_NON_FUSA
u64 nvgpu_us_counter(void) u64 nvgpu_us_counter(void)
{ {
return (u64)nvgpu_current_time_us(); return (u64)nvgpu_current_time_us();
} }
#endif
u64 nvgpu_get_cycles(void) u64 nvgpu_get_cycles(void)
{ {