gpu: nvgpu: Remove the GPU-NEXT conditional

Remove build conditional for GPU-NEXT. It was used for including
code for tu104, but now it's part of main nvgpu. Leave a TURING
conditional to not need Turing code in other builds.

JIRA NVGPU-961

Change-Id: I74177863c451d78b6db6165249561f15eadc3cc3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1936803
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Terje Bergstrom
2018-10-26 13:54:56 -07:00
committed by mobile promotions
parent 63da5366a6
commit 7525c1337b
11 changed files with 55 additions and 110 deletions

View File

@@ -147,7 +147,7 @@ config NVGPU_USE_TEGRA_ALLOC_FD
It is only available in Tegra kernel. It is only available in Tegra kernel.
config TEGRA_GPU_NEXT config NVGPU_SUPPORT_TURING
bool "Turing family GPU" bool "Turing family GPU"
depends on GK20A && ARCH_TEGRA_19x_SOC depends on GK20A && ARCH_TEGRA_19x_SOC
default y default y

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@@ -26,6 +26,7 @@ nvgpu-y += common/bus/bus_gk20a.o \
common/bus/bus_gm20b.o \ common/bus/bus_gm20b.o \
common/bus/bus_gp10b.o \ common/bus/bus_gp10b.o \
common/bus/bus_gv100.o \ common/bus/bus_gv100.o \
common/bus/bus_tu104.o \
common/priv_ring/priv_ring_gm20b.o \ common/priv_ring/priv_ring_gm20b.o \
common/priv_ring/priv_ring_gp10b.o \ common/priv_ring/priv_ring_gp10b.o \
common/ptimer/ptimer.o \ common/ptimer/ptimer.o \
@@ -35,6 +36,7 @@ nvgpu-y += common/bus/bus_gk20a.o \
common/fb/fb_gp106.o \ common/fb/fb_gp106.o \
common/fb/fb_gv11b.o \ common/fb/fb_gv11b.o \
common/fb/fb_gv100.o \ common/fb/fb_gv100.o \
common/fb/fb_tu104.o \
common/perf/perf_gm20b.o \ common/perf/perf_gm20b.o \
common/perf/perf_gv11b.o \ common/perf/perf_gv11b.o \
common/perf/perfbuf.o \ common/perf/perfbuf.o \
@@ -53,13 +55,27 @@ nvgpu-y += common/bus/bus_gk20a.o \
common/mc/mc_gp10b.o \ common/mc/mc_gp10b.o \
common/mc/mc_gv11b.o \ common/mc/mc_gv11b.o \
common/mc/mc_gv100.o \ common/mc/mc_gv100.o \
common/mc/mc_tu104.o \
common/sync/channel_sync.o \ common/sync/channel_sync.o \
common/sync/channel_sync_semaphore.o \ common/sync/channel_sync_semaphore.o \
common/boardobj/boardobj.o \ common/boardobj/boardobj.o \
common/boardobj/boardobjgrp.o \ common/boardobj/boardobjgrp.o \
common/boardobj/boardobjgrpmask.o \ common/boardobj/boardobjgrpmask.o \
common/boardobj/boardobjgrp_e255.o \ common/boardobj/boardobjgrp_e255.o \
common/boardobj/boardobjgrp_e32.o common/boardobj/boardobjgrp_e32.o \
common/ltc/ltc.o \
common/ltc/ltc_gm20b.o \
common/ltc/ltc_gp10b.o \
common/ltc/ltc_gv11b.o \
common/ltc/ltc_tu104.o \
common/netlist/netlist.o \
common/netlist/netlist_sim.o \
common/netlist/netlist_gm20b.o \
common/netlist/netlist_gp106.o \
common/netlist/netlist_gp10b.o \
common/netlist/netlist_gv100.o \
common/netlist/netlist_gv11b.o \
common/netlist/netlist_tu104.o
# Linux specific parts of nvgpu. # Linux specific parts of nvgpu.
nvgpu-y += \ nvgpu-y += \
@@ -101,7 +117,8 @@ nvgpu-y += \
os/linux/nvlink.o \ os/linux/nvlink.o \
os/linux/dt.o \ os/linux/dt.o \
os/linux/ecc_sysfs.o \ os/linux/ecc_sysfs.o \
os/linux/ltc.o os/linux/ltc.o \
os/linux/os_ops_tu104.o
nvgpu-$(CONFIG_GK20A_VIDMEM) += \ nvgpu-$(CONFIG_GK20A_VIDMEM) += \
os/linux/dmabuf_vidmem.o os/linux/dmabuf_vidmem.o
@@ -222,18 +239,6 @@ nvgpu-y += \
common/pmu/pmu_pg.o \ common/pmu/pmu_pg.o \
common/pmu/pmu_perfmon.o \ common/pmu/pmu_perfmon.o \
common/pmu/pmu_debug.o \ common/pmu/pmu_debug.o \
common/netlist/netlist.o \
common/netlist/netlist_sim.o \
common/netlist/netlist_gm20b.o \
common/netlist/netlist_gp106.o \
common/netlist/netlist_gp10b.o \
common/netlist/netlist_gv100.o \
common/netlist/netlist_gv11b.o \
common/netlist/netlist_tu104.o \
common/ltc/ltc.o \
common/ltc/ltc_gm20b.o \
common/ltc/ltc_gp10b.o \
common/ltc/ltc_gv11b.o \
common/sec2/sec2.o \ common/sec2/sec2.o \
common/sec2/sec2_ipc.o \ common/sec2/sec2_ipc.o \
common/io_common.o \ common/io_common.o \
@@ -344,6 +349,19 @@ nvgpu-y += \
gv100/pmu_gv100.o \ gv100/pmu_gv100.o \
gv100/perf_gv100.o \ gv100/perf_gv100.o \
gv100/gsp_gv100.o \ gv100/gsp_gv100.o \
gv100/clk_gv100.o \
tu104/hal_tu104.o \
tu104/fifo_tu104.o \
tu104/gr_tu104.o \
tu104/func_tu104.o \
tu104/bios_tu104.o \
tu104/nvlink_tu104.o \
tu104/fbpa_tu104.o \
tu104/flcn_tu104.o \
tu104/sec2_tu104.o \
tu104/ecc_tu104.o \
tu104/regops_tu104.o \
tu104/acr_tu104.o \
pstate/pstate.o \ pstate/pstate.o \
clk/clk_vin.o \ clk/clk_vin.o \
clk/clk_fll.o \ clk/clk_fll.o \
@@ -372,28 +390,4 @@ nvgpu-y += \
therm/thrmchannel.o \ therm/thrmchannel.o \
therm/thrmpmu.o \ therm/thrmpmu.o \
lpwr/rppg.o \ lpwr/rppg.o \
lpwr/lpwr.o \ lpwr/lpwr.o
gv100/clk_gv100.o
nvgpu-$(CONFIG_TEGRA_GPU_NEXT) += \
common/bus/bus_tu104.o \
common/fb/fb_tu104.o \
common/ltc/ltc_tu104.o \
common/mc/mc_tu104.o
nvgpu-$(CONFIG_TEGRA_GPU_NEXT) += \
tu104/hal_tu104.o \
tu104/fifo_tu104.o \
tu104/gr_tu104.o \
tu104/func_tu104.o \
tu104/bios_tu104.o \
tu104/nvlink_tu104.o \
tu104/fbpa_tu104.o \
tu104/flcn_tu104.o \
tu104/sec2_tu104.o \
tu104/ecc_tu104.o \
tu104/regops_tu104.o \
tu104/acr_tu104.o
nvgpu-$(CONFIG_TEGRA_GPU_NEXT) += \
os/linux/os_ops_tu104.o

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@@ -33,9 +33,7 @@
#include "gp106/hal_gp106.h" #include "gp106/hal_gp106.h"
#include "gv100/hal_gv100.h" #include "gv100/hal_gv100.h"
#include "gv11b/hal_gv11b.h" #include "gv11b/hal_gv11b.h"
#if defined(CONFIG_TEGRA_GPU_NEXT) #include "tu104/hal_tu104.h"
#include "nvgpu_gpuid_next.h"
#endif
int nvgpu_init_hal(struct gk20a *g) int nvgpu_init_hal(struct gk20a *g)
{ {
@@ -80,9 +78,9 @@ int nvgpu_init_hal(struct gk20a *g)
return -ENODEV; return -ENODEV;
} }
break; break;
#if defined(CONFIG_TEGRA_GPU_NEXT) #if defined(CONFIG_NVGPU_SUPPORT_TURING)
case NVGPU_GPUID_NEXT: case NVGPU_GPUID_TU104:
if (NVGPU_NEXT_INIT_HAL(g) != 0) { if (tu104_init_hal(g) != 0) {
return -ENODEV; return -ENODEV;
} }
break; break;

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@@ -24,14 +24,13 @@
#include <nvgpu/netlist.h> #include <nvgpu/netlist.h>
#include "netlist_tu104.h" #include "netlist_tu104.h"
#include "nvgpu_gpuid_next.h"
int tu104_netlist_get_name(struct gk20a *g, int index, char *name) int tu104_netlist_get_name(struct gk20a *g, int index, char *name)
{ {
u32 ver = g->params.gpu_arch + g->params.gpu_impl; u32 ver = g->params.gpu_arch + g->params.gpu_impl;
switch (ver) { switch (ver) {
case NVGPU_GPUID_NEXT: case NVGPU_GPUID_TU104:
(void) sprintf(name, "%s/%s", "tu104", "NETC_img.bin"); (void) sprintf(name, "%s/%s", "tu104", "NETC_img.bin");
break; break;
default: default:

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@@ -35,7 +35,7 @@
#define NVGPU_PMU_NS_UCODE_IMAGE "gpmu_ucode.bin" #define NVGPU_PMU_NS_UCODE_IMAGE "gpmu_ucode.bin"
/* PMU F/W version */ /* PMU F/W version */
#define APP_VERSION_GPU_NEXT 24408680U #define APP_VERSION_TU10X 24408680U
#define APP_VERSION_GV11B 25005711U #define APP_VERSION_GV11B 25005711U
#define APP_VERSION_GV10X 24283706U #define APP_VERSION_GV10X 24283706U
#define APP_VERSION_GP10X 24076634U #define APP_VERSION_GP10X 24076634U
@@ -1228,7 +1228,7 @@ static int nvgpu_init_pmu_fw_ver_ops(struct nvgpu_pmu *pmu)
break; break;
case APP_VERSION_GV11B: case APP_VERSION_GV11B:
case APP_VERSION_GV10X: case APP_VERSION_GV10X:
case APP_VERSION_GPU_NEXT: case APP_VERSION_TU10X:
g->ops.pmu_ver.pg_cmd_eng_buf_load_size = g->ops.pmu_ver.pg_cmd_eng_buf_load_size =
pg_cmd_eng_buf_load_size_v2; pg_cmd_eng_buf_load_size_v2;
g->ops.pmu_ver.pg_cmd_eng_buf_load_set_cmd_type = g->ops.pmu_ver.pg_cmd_eng_buf_load_set_cmd_type =
@@ -1294,7 +1294,7 @@ static int nvgpu_init_pmu_fw_ver_ops(struct nvgpu_pmu *pmu)
g->ops.pmu_ver.pmu_allocation_get_fb_size = g->ops.pmu_ver.pmu_allocation_get_fb_size =
pmu_allocation_get_fb_size_v3; pmu_allocation_get_fb_size_v3;
if (pmu->desc->app_version == APP_VERSION_GV10X || if (pmu->desc->app_version == APP_VERSION_GV10X ||
pmu->desc->app_version == APP_VERSION_GPU_NEXT) { pmu->desc->app_version == APP_VERSION_TU10X) {
g->ops.pmu_ver.get_pmu_init_msg_pmu_queue_params = g->ops.pmu_ver.get_pmu_init_msg_pmu_queue_params =
get_pmu_init_msg_pmu_queue_params_v5; get_pmu_init_msg_pmu_queue_params_v5;
g->ops.pmu_ver.get_pmu_msg_pmu_init_msg_ptr = g->ops.pmu_ver.get_pmu_msg_pmu_init_msg_ptr =

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@@ -38,11 +38,9 @@
#include "gp106/acr_gp106.h" #include "gp106/acr_gp106.h"
#include "gp106/pmu_gp106.h" #include "gp106/pmu_gp106.h"
#include "gv100/acr_gv100.h" #include "gv100/acr_gv100.h"
#include "tu104/acr_tu104.h"
#include "sec2_gp106.h" #include "sec2_gp106.h"
#if defined(CONFIG_TEGRA_GPU_NEXT)
#include "nvgpu_gpuid_next.h"
#endif
#include <nvgpu/hw/gp106/hw_psec_gp106.h> #include <nvgpu/hw/gp106/hw_psec_gp106.h>
#include <nvgpu/hw/gp106/hw_pwr_gp106.h> #include <nvgpu/hw/gp106/hw_pwr_gp106.h>
@@ -214,13 +212,11 @@ int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
GV100_FECS_UCODE_SIG, GV100_FECS_UCODE_SIG,
NVGPU_REQUEST_FIRMWARE_NO_SOC); NVGPU_REQUEST_FIRMWARE_NO_SOC);
break; break;
#if defined(CONFIG_TEGRA_GPU_NEXT) case NVGPU_GPUID_TU104:
case NVGPU_GPUID_NEXT:
fecs_sig = nvgpu_request_firmware(g, fecs_sig = nvgpu_request_firmware(g,
NVGPU_GPU_NEXT_FECS_UCODE_SIG, TU104_FECS_UCODE_SIG,
NVGPU_REQUEST_FIRMWARE_NO_SOC); NVGPU_REQUEST_FIRMWARE_NO_SOC);
break; break;
#endif
default: default:
nvgpu_err(g, "no support for GPUID %x", ver); nvgpu_err(g, "no support for GPUID %x", ver);
} }
@@ -318,13 +314,11 @@ int gpccs_ucode_details(struct gk20a *g, struct flcn_ucode_img_v1 *p_img)
GV100_GPCCS_UCODE_SIG, GV100_GPCCS_UCODE_SIG,
NVGPU_REQUEST_FIRMWARE_NO_SOC); NVGPU_REQUEST_FIRMWARE_NO_SOC);
break; break;
#if defined(CONFIG_TEGRA_GPU_NEXT) case NVGPU_GPUID_TU104:
case NVGPU_GPUID_NEXT:
gpccs_sig = nvgpu_request_firmware(g, gpccs_sig = nvgpu_request_firmware(g,
NVGPU_GPU_NEXT_GPCCS_UCODE_SIG, TU104_GPCCS_UCODE_SIG,
NVGPU_REQUEST_FIRMWARE_NO_SOC); NVGPU_REQUEST_FIRMWARE_NO_SOC);
break; break;
#endif
default: default:
nvgpu_err(g, "no support for GPUID %x", ver); nvgpu_err(g, "no support for GPUID %x", ver);
} }

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@@ -1793,6 +1793,7 @@ int gk20a_wait_for_idle(struct gk20a *g);
#define NVGPU_GPUID_GP106 0x00000136 #define NVGPU_GPUID_GP106 0x00000136
#define NVGPU_GPUID_GV11B 0x0000015B #define NVGPU_GPUID_GV11B 0x0000015B
#define NVGPU_GPUID_GV100 0x00000140 #define NVGPU_GPUID_GV100 0x00000140
#define NVGPU_GPUID_TU104 0x00000164
int gk20a_init_gpu_characteristics(struct gk20a *g); int gk20a_init_gpu_characteristics(struct gk20a *g);

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@@ -1,39 +0,0 @@
/*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_GPUID_NEXT_H
#define NVGPU_GPUID_NEXT_H
#define NVGPU_GPUID_NEXT 0x00000164
#define NVGPU_GPU_NEXT_FECS_UCODE_SIG "tu104/fecs_sig.bin"
#define NVGPU_GPU_NEXT_GPCCS_UCODE_SIG "tu104/gpccs_sig.bin"
#define NVGPU_NEXT_INIT_HAL tu104_init_hal
#define NVGPU_NEXT_INIT_OS_OPS nvgpu_tu104_init_os_ops
struct nvgpu_os_linux;
extern int tu104_init_hal(struct gk20a *g);
extern void nvgpu_tu104_init_os_ops(struct nvgpu_os_linux *l);
#endif /* NVGPU_GPUID_NEXT_H */

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@@ -21,10 +21,7 @@
#include "os_ops_gp106.h" #include "os_ops_gp106.h"
#include "os_ops_gv11b.h" #include "os_ops_gv11b.h"
#include "os_ops_gv100.h" #include "os_ops_gv100.h"
#include "os_ops_tu104.h"
#if defined(CONFIG_TEGRA_GPU_NEXT)
#include "nvgpu_gpuid_next.h"
#endif
int nvgpu_init_os_linux_ops(struct nvgpu_os_linux *l) int nvgpu_init_os_linux_ops(struct nvgpu_os_linux *l)
{ {
@@ -48,11 +45,9 @@ int nvgpu_init_os_linux_ops(struct nvgpu_os_linux *l)
case NVGPU_GPUID_GV11B: case NVGPU_GPUID_GV11B:
nvgpu_gv11b_init_os_ops(l); nvgpu_gv11b_init_os_ops(l);
break; break;
#if defined(CONFIG_TEGRA_GPU_NEXT) case NVGPU_GPUID_TU104:
case NVGPU_GPUID_NEXT: nvgpu_tu104_init_os_ops(l);
NVGPU_NEXT_INIT_OS_OPS(l);
break; break;
#endif
default: default:
break; break;
} }

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@@ -17,6 +17,6 @@
#ifndef __LINUX_OS_OPS_TU104_H #ifndef __LINUX_OS_OPS_TU104_H
#define __LINUX_OS_OPS_TU104_H #define __LINUX_OS_OPS_TU104_H
void nvgpu_tu104_init_os_ops(struct nvgpu_os_linux *l) void nvgpu_tu104_init_os_ops(struct nvgpu_os_linux *l);
#endif #endif

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@@ -25,6 +25,9 @@
#define TU104_MAX_SUPPORTED_LSFM 4 #define TU104_MAX_SUPPORTED_LSFM 4
#define TU104_FECS_UCODE_SIG "tu104/fecs_sig.bin"
#define TU104_GPCCS_UCODE_SIG "tu104/gpccs_sig.bin"
void nvgpu_tu104_acr_sw_init(struct gk20a *g, struct nvgpu_acr *acr); void nvgpu_tu104_acr_sw_init(struct gk20a *g, struct nvgpu_acr *acr);
#endif /*NVGPU_ACR_TU104_H*/ #endif /*NVGPU_ACR_TU104_H*/