gpu: nvgpu: pmu: Add support to set nvgpu_next pmu init

Select nvgpu_next_pmu_init when config_next flag is set.
This will let pmu load nvgpu_next binaries.

Bug 3579665

Change-Id: Ifc15ba1ff5eacfba22de9676d5fe93beda608153
Signed-off-by: mpoojary <mpoojary@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2702292
Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Seema Khowala <seemaj@nvidia.com>
This commit is contained in:
mpoojary
2022-04-25 07:44:37 +00:00
committed by mobile promotions
parent 0b0b68be72
commit 769ec3f88b

View File

@@ -33,6 +33,10 @@
#include <nvgpu/pmu/fw.h>
#include <nvgpu/pmu/pmu_pg.h>
#if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
#include <nvgpu_next_fw.h>
#endif
/* PMU UCODE IMG */
#define NVGPU_PMU_UCODE_IMAGE "gpmu_ucode_image.bin"
#define NVGPU_PMU_UCODE_DESC "gpmu_ucode_desc.bin"
@@ -325,10 +329,14 @@ int nvgpu_pmu_init_pmu_fw(struct gk20a *g, struct nvgpu_pmu *pmu,
NVGPU_PMU_UCODE_NEXT_SIG);
} else {
nvgpu_pmu_dbg(g, "FW read for PROD RISCV/PKC");
#if defined(CONFIG_NVGPU_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
err = nvgpu_next_pmu_load_fw(g);
#else
err = pmu_fw_read(g,
NVGPU_PMU_UCODE_NEXT_PROD_IMAGE,
NVGPU_PMU_UCODE_NEXT_PROD_DESC,
NVGPU_PMU_UCODE_NEXT_PROD_SIG);
#endif
}
} else {
nvgpu_pmu_dbg(g, "FW read for Falcon/AES\n");