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gpu: nvgpu: gv11b: disable idle clock slowdown

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Updated thermal settings as per hw POR update:
- Disabled idle clock slowdown
- Updated therm_grad_stepping1_pdiv_duration as per updated
  hw por value.

Bug 200365110

Change-Id: I0c67366ecebd5681343746e9badb57fa74dfaeaa
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1643895
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
seshendra Gadagottu
2018-01-22 15:03:02 -08:00
committed by mobile promotions
parent fb0a23ea16
commit 7bd1c4640c
2 changed files with 41 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/gpu/nvgpu/gv11b/therm_gv11b.c
View File

@@ -1,7 +1,7 @@
/*
* GV11B Therm
*
* Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2015-2018, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -81,12 +81,18 @@ int gv11b_init_therm_setup_hw(struct gk20a *g)
gk20a_writel(g, therm_config2_r(), v);
gk20a_writel(g, therm_grad_stepping1_r(),
therm_grad_stepping1_pdiv_duration_f(0x40));
therm_grad_stepping1_pdiv_duration_f(0xbf4));
v = gk20a_readl(g, therm_grad_stepping0_r());
v |= therm_grad_stepping0_feature_enable_f();
gk20a_writel(g, therm_grad_stepping0_r(), v);
/* disable idle clock slowdown */
v = therm_clk_slowdown_2_idle_condition_a_select_f(0) |
therm_clk_slowdown_2_idle_condition_a_type_never_f() |
therm_clk_slowdown_2_idle_condition_b_type_never_f();
gk20a_writel(g, therm_clk_slowdown_2_r(0), v);
return 0;
}

34
drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_therm_gv11b.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -332,6 +332,38 @@ static inline u32 therm_clk_slowdown_idle_factor_disabled_f(void)
{
return 0x0U;
}
static inline u32 therm_clk_slowdown_2_r(u32 i)
{
return 0x000201a0U + i*4U;
}
static inline u32 therm_clk_slowdown_2_idle_condition_a_select_f(u32 v)
{
return (v & 0xfU) << 0U;
}
static inline u32 therm_clk_slowdown_2_idle_condition_a_type_f(u32 v)
{
return (v & 0x7U) << 4U;
}
static inline u32 therm_clk_slowdown_2_idle_condition_a_type_v(u32 r)
{
return (r >> 4U) & 0x7U;
}
static inline u32 therm_clk_slowdown_2_idle_condition_a_type_never_f(void)
{
return 0x40U;
}
static inline u32 therm_clk_slowdown_2_idle_condition_b_type_f(u32 v)
{
return (v & 0x7U) << 12U;
}
static inline u32 therm_clk_slowdown_2_idle_condition_b_type_v(u32 r)
{
return (r >> 12U) & 0x7U;
}
static inline u32 therm_clk_slowdown_2_idle_condition_b_type_never_f(void)
{
return 0x4000U;
}
static inline u32 therm_grad_stepping_table_r(u32 i)
{
return 0x000202c8U + i*4U;