mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-23 01:50:07 +03:00
gpu: nvgpu: remove use of NVGPU_CTXSW_FILTER_ISSET
- Remove the usage of NVGPU_CTXSW_FILTER_ISSET splattered across nvgpu, and replace with a MACRO defined in common code. The usage is still inside Linux, but this helps the subsequent unification efforts, e.g. to unify the fecs trace path. - Remove "uapi/linux/nvgpu.h" from common code. EVLR-3078 Change-Id: I60b0e1627576a4b255671d58530d8c773ea6154c Signed-off-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1803210 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
mobile promotions
parent
064ba6a7ef
commit
7bf80a1c69
@@ -23,7 +23,6 @@
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
#include <linux/debugfs.h>
|
||||
#endif
|
||||
#include <uapi/linux/nvgpu.h>
|
||||
|
||||
#include <nvgpu/kmem.h>
|
||||
#include <nvgpu/dma.h>
|
||||
@@ -738,14 +737,14 @@ int gk20a_fecs_trace_deinit(struct gk20a *g)
|
||||
}
|
||||
|
||||
int gk20a_gr_max_entries(struct gk20a *g,
|
||||
struct nvgpu_ctxsw_trace_filter *filter)
|
||||
struct nvgpu_gpu_ctxsw_trace_filter *filter)
|
||||
{
|
||||
int n;
|
||||
int tag;
|
||||
|
||||
/* Compute number of entries per record, with given filter */
|
||||
for (n = 0, tag = 0; tag < gk20a_fecs_trace_num_ts(); tag++)
|
||||
n += (NVGPU_CTXSW_FILTER_ISSET(tag, filter) != 0);
|
||||
n += (NVGPU_GPU_CTXSW_FILTER_ISSET(tag, filter) != 0);
|
||||
|
||||
/* Return max number of entries generated for the whole ring */
|
||||
return n * GK20A_FECS_TRACE_NUM_RECORDS;
|
||||
|
||||
@@ -25,7 +25,7 @@
|
||||
|
||||
struct gk20a;
|
||||
struct channel_gk20a;
|
||||
struct nvgpu_ctxsw_trace_filter;
|
||||
struct nvgpu_gpu_ctxsw_trace_filter;
|
||||
|
||||
int gk20a_fecs_trace_poll(struct gk20a *g);
|
||||
int gk20a_fecs_trace_init(struct gk20a *g);
|
||||
@@ -35,7 +35,7 @@ int gk20a_fecs_trace_unbind_channel(struct gk20a *g, struct channel_gk20a *ch);
|
||||
int gk20a_fecs_trace_reset(struct gk20a *g);
|
||||
int gk20a_fecs_trace_deinit(struct gk20a *g);
|
||||
int gk20a_gr_max_entries(struct gk20a *g,
|
||||
struct nvgpu_ctxsw_trace_filter *filter);
|
||||
struct nvgpu_gpu_ctxsw_trace_filter *filter);
|
||||
int gk20a_fecs_trace_enable(struct gk20a *g);
|
||||
int gk20a_fecs_trace_disable(struct gk20a *g);
|
||||
bool gk20a_fecs_trace_is_enabled(struct gk20a *g);
|
||||
|
||||
@@ -43,7 +43,7 @@ struct nvgpu_mem_sgt;
|
||||
struct nvgpu_warpstate;
|
||||
struct nvgpu_clk_arb;
|
||||
#ifdef CONFIG_GK20A_CTXSW_TRACE
|
||||
struct nvgpu_ctxsw_trace_filter;
|
||||
struct nvgpu_gpu_ctxsw_trace_filter;
|
||||
#endif
|
||||
struct priv_cmd_entry;
|
||||
|
||||
@@ -894,7 +894,7 @@ struct gpu_ops {
|
||||
struct {
|
||||
int (*init)(struct gk20a *g);
|
||||
int (*max_entries)(struct gk20a *,
|
||||
struct nvgpu_ctxsw_trace_filter *filter);
|
||||
struct nvgpu_gpu_ctxsw_trace_filter *filter);
|
||||
int (*flush)(struct gk20a *g);
|
||||
int (*poll)(struct gk20a *g);
|
||||
int (*enable)(struct gk20a *g);
|
||||
@@ -911,7 +911,7 @@ struct gpu_ops {
|
||||
int (*mmap_user_buffer)(struct gk20a *g,
|
||||
struct vm_area_struct *vma);
|
||||
int (*set_filter)(struct gk20a *g,
|
||||
struct nvgpu_ctxsw_trace_filter *filter);
|
||||
struct nvgpu_gpu_ctxsw_trace_filter *filter);
|
||||
} fecs_trace;
|
||||
#endif
|
||||
struct {
|
||||
|
||||
@@ -44,6 +44,15 @@ struct channel_gk20a;
|
||||
#define NVGPU_GPU_CTXSW_TAG_LAST \
|
||||
NVGPU_GPU_CTXSW_TAG_INVALID_TIMESTAMP
|
||||
|
||||
#define NVGPU_GPU_CTXSW_FILTER_ISSET(n, p) \
|
||||
((p)->tag_bits[(n) / 64] & (1 << ((n) & 63)))
|
||||
|
||||
#define NVGPU_GPU_CTXSW_FILTER_SIZE (NVGPU_GPU_CTXSW_TAG_LAST + 1)
|
||||
|
||||
struct nvgpu_gpu_ctxsw_trace_filter {
|
||||
u64 tag_bits[(NVGPU_GPU_CTXSW_FILTER_SIZE + 63) / 64];
|
||||
};
|
||||
|
||||
/*
|
||||
* The binary format of 'struct nvgpu_gpu_ctxsw_trace_entry' introduced here
|
||||
* should match that of 'struct nvgpu_ctxsw_trace_entry' defined in uapi
|
||||
|
||||
@@ -46,7 +46,7 @@ struct gk20a_ctxsw_dev {
|
||||
|
||||
struct nvgpu_ctxsw_ring_header *hdr;
|
||||
struct nvgpu_gpu_ctxsw_trace_entry *ents;
|
||||
struct nvgpu_ctxsw_trace_filter filter;
|
||||
struct nvgpu_gpu_ctxsw_trace_filter filter;
|
||||
bool write_enabled;
|
||||
struct nvgpu_cond readout_wq;
|
||||
size_t size;
|
||||
@@ -244,13 +244,25 @@ static int gk20a_ctxsw_dev_ioctl_ring_setup(struct gk20a_ctxsw_dev *dev,
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void nvgpu_set_ctxsw_trace_filter_args(struct nvgpu_gpu_ctxsw_trace_filter *filter_dst,
|
||||
struct nvgpu_ctxsw_trace_filter *filter_src)
|
||||
{
|
||||
memcpy(filter_dst->tag_bits, filter_src->tag_bits, (NVGPU_CTXSW_FILTER_SIZE + 63) / 64);
|
||||
}
|
||||
|
||||
static void nvgpu_get_ctxsw_trace_filter_args(struct nvgpu_ctxsw_trace_filter *filter_dst,
|
||||
struct nvgpu_gpu_ctxsw_trace_filter *filter_src)
|
||||
{
|
||||
memcpy(filter_dst->tag_bits, filter_src->tag_bits, (NVGPU_CTXSW_FILTER_SIZE + 63) / 64);
|
||||
}
|
||||
|
||||
static int gk20a_ctxsw_dev_ioctl_set_filter(struct gk20a_ctxsw_dev *dev,
|
||||
struct nvgpu_ctxsw_trace_filter_args *args)
|
||||
{
|
||||
struct gk20a *g = dev->g;
|
||||
|
||||
nvgpu_mutex_acquire(&dev->write_lock);
|
||||
dev->filter = args->filter;
|
||||
nvgpu_set_ctxsw_trace_filter_args(&dev->filter, &args->filter);
|
||||
nvgpu_mutex_release(&dev->write_lock);
|
||||
|
||||
if (g->ops.fecs_trace.set_filter)
|
||||
@@ -262,7 +274,7 @@ static int gk20a_ctxsw_dev_ioctl_get_filter(struct gk20a_ctxsw_dev *dev,
|
||||
struct nvgpu_ctxsw_trace_filter_args *args)
|
||||
{
|
||||
nvgpu_mutex_acquire(&dev->write_lock);
|
||||
args->filter = dev->filter;
|
||||
nvgpu_get_ctxsw_trace_filter_args(&args->filter, &dev->filter);
|
||||
nvgpu_mutex_release(&dev->write_lock);
|
||||
|
||||
return 0;
|
||||
@@ -650,7 +662,7 @@ int gk20a_ctxsw_trace_write(struct gk20a *g,
|
||||
goto drop;
|
||||
}
|
||||
|
||||
if (!NVGPU_CTXSW_FILTER_ISSET(entry->tag, &dev->filter)) {
|
||||
if (!NVGPU_GPU_CTXSW_FILTER_ISSET(entry->tag, &dev->filter)) {
|
||||
reason = "filtered out";
|
||||
goto filter;
|
||||
}
|
||||
|
||||
@@ -190,7 +190,7 @@ int vgpu_mmap_user_buffer(struct gk20a *g, struct vm_area_struct *vma)
|
||||
|
||||
#ifdef CONFIG_GK20A_CTXSW_TRACE
|
||||
int vgpu_fecs_trace_max_entries(struct gk20a *g,
|
||||
struct nvgpu_ctxsw_trace_filter *filter)
|
||||
struct nvgpu_gpu_ctxsw_trace_filter *filter)
|
||||
{
|
||||
struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
|
||||
|
||||
@@ -202,7 +202,7 @@ int vgpu_fecs_trace_max_entries(struct gk20a *g,
|
||||
#endif
|
||||
|
||||
int vgpu_fecs_trace_set_filter(struct gk20a *g,
|
||||
struct nvgpu_ctxsw_trace_filter *filter)
|
||||
struct nvgpu_gpu_ctxsw_trace_filter *filter)
|
||||
{
|
||||
struct tegra_vgpu_cmd_msg msg = {
|
||||
.cmd = TEGRA_VGPU_CMD_FECS_TRACE_SET_FILTER,
|
||||
|
||||
@@ -27,7 +27,7 @@
|
||||
|
||||
struct gk20a;
|
||||
struct vm_area_struct;
|
||||
struct nvgpu_ctxsw_trace_filter;
|
||||
struct nvgpu_gpu_ctxsw_trace_filter;
|
||||
|
||||
void vgpu_fecs_trace_data_update(struct gk20a *g);
|
||||
int vgpu_fecs_trace_init(struct gk20a *g);
|
||||
@@ -40,8 +40,8 @@ int vgpu_alloc_user_buffer(struct gk20a *g, void **buf, size_t *size);
|
||||
int vgpu_free_user_buffer(struct gk20a *g);
|
||||
int vgpu_mmap_user_buffer(struct gk20a *g, struct vm_area_struct *vma);
|
||||
int vgpu_fecs_trace_max_entries(struct gk20a *g,
|
||||
struct nvgpu_ctxsw_trace_filter *filter);
|
||||
struct nvgpu_gpu_ctxsw_trace_filter *filter);
|
||||
int vgpu_fecs_trace_set_filter(struct gk20a *g,
|
||||
struct nvgpu_ctxsw_trace_filter *filter);
|
||||
struct nvgpu_gpu_ctxsw_trace_filter *filter);
|
||||
|
||||
#endif /* __FECS_TRACE_VGPU_H */
|
||||
|
||||
Reference in New Issue
Block a user