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git://nv-tegra.nvidia.com/linux-nvgpu.git
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gpu: nvgpu: remove use of NVGPU_CTXSW_FILTER_ISSET
- Remove the usage of NVGPU_CTXSW_FILTER_ISSET splattered across nvgpu, and replace with a MACRO defined in common code. The usage is still inside Linux, but this helps the subsequent unification efforts, e.g. to unify the fecs trace path. - Remove "uapi/linux/nvgpu.h" from common code. EVLR-3078 Change-Id: I60b0e1627576a4b255671d58530d8c773ea6154c Signed-off-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1803210 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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7bf80a1c69
@@ -23,7 +23,6 @@
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#ifdef CONFIG_DEBUG_FS
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#ifdef CONFIG_DEBUG_FS
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#include <linux/debugfs.h>
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#include <linux/debugfs.h>
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#endif
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#endif
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#include <uapi/linux/nvgpu.h>
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#include <nvgpu/kmem.h>
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#include <nvgpu/kmem.h>
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#include <nvgpu/dma.h>
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#include <nvgpu/dma.h>
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@@ -738,14 +737,14 @@ int gk20a_fecs_trace_deinit(struct gk20a *g)
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}
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}
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int gk20a_gr_max_entries(struct gk20a *g,
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int gk20a_gr_max_entries(struct gk20a *g,
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struct nvgpu_ctxsw_trace_filter *filter)
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struct nvgpu_gpu_ctxsw_trace_filter *filter)
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{
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{
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int n;
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int n;
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int tag;
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int tag;
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/* Compute number of entries per record, with given filter */
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/* Compute number of entries per record, with given filter */
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for (n = 0, tag = 0; tag < gk20a_fecs_trace_num_ts(); tag++)
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for (n = 0, tag = 0; tag < gk20a_fecs_trace_num_ts(); tag++)
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n += (NVGPU_CTXSW_FILTER_ISSET(tag, filter) != 0);
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n += (NVGPU_GPU_CTXSW_FILTER_ISSET(tag, filter) != 0);
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/* Return max number of entries generated for the whole ring */
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/* Return max number of entries generated for the whole ring */
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return n * GK20A_FECS_TRACE_NUM_RECORDS;
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return n * GK20A_FECS_TRACE_NUM_RECORDS;
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@@ -25,7 +25,7 @@
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struct gk20a;
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struct gk20a;
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struct channel_gk20a;
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struct channel_gk20a;
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struct nvgpu_ctxsw_trace_filter;
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struct nvgpu_gpu_ctxsw_trace_filter;
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int gk20a_fecs_trace_poll(struct gk20a *g);
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int gk20a_fecs_trace_poll(struct gk20a *g);
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int gk20a_fecs_trace_init(struct gk20a *g);
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int gk20a_fecs_trace_init(struct gk20a *g);
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@@ -35,7 +35,7 @@ int gk20a_fecs_trace_unbind_channel(struct gk20a *g, struct channel_gk20a *ch);
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int gk20a_fecs_trace_reset(struct gk20a *g);
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int gk20a_fecs_trace_reset(struct gk20a *g);
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int gk20a_fecs_trace_deinit(struct gk20a *g);
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int gk20a_fecs_trace_deinit(struct gk20a *g);
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int gk20a_gr_max_entries(struct gk20a *g,
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int gk20a_gr_max_entries(struct gk20a *g,
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struct nvgpu_ctxsw_trace_filter *filter);
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struct nvgpu_gpu_ctxsw_trace_filter *filter);
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int gk20a_fecs_trace_enable(struct gk20a *g);
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int gk20a_fecs_trace_enable(struct gk20a *g);
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int gk20a_fecs_trace_disable(struct gk20a *g);
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int gk20a_fecs_trace_disable(struct gk20a *g);
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bool gk20a_fecs_trace_is_enabled(struct gk20a *g);
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bool gk20a_fecs_trace_is_enabled(struct gk20a *g);
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@@ -43,7 +43,7 @@ struct nvgpu_mem_sgt;
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struct nvgpu_warpstate;
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struct nvgpu_warpstate;
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struct nvgpu_clk_arb;
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struct nvgpu_clk_arb;
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#ifdef CONFIG_GK20A_CTXSW_TRACE
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#ifdef CONFIG_GK20A_CTXSW_TRACE
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struct nvgpu_ctxsw_trace_filter;
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struct nvgpu_gpu_ctxsw_trace_filter;
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#endif
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#endif
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struct priv_cmd_entry;
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struct priv_cmd_entry;
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@@ -894,7 +894,7 @@ struct gpu_ops {
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struct {
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struct {
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int (*init)(struct gk20a *g);
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int (*init)(struct gk20a *g);
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int (*max_entries)(struct gk20a *,
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int (*max_entries)(struct gk20a *,
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struct nvgpu_ctxsw_trace_filter *filter);
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struct nvgpu_gpu_ctxsw_trace_filter *filter);
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int (*flush)(struct gk20a *g);
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int (*flush)(struct gk20a *g);
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int (*poll)(struct gk20a *g);
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int (*poll)(struct gk20a *g);
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int (*enable)(struct gk20a *g);
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int (*enable)(struct gk20a *g);
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@@ -911,7 +911,7 @@ struct gpu_ops {
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int (*mmap_user_buffer)(struct gk20a *g,
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int (*mmap_user_buffer)(struct gk20a *g,
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struct vm_area_struct *vma);
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struct vm_area_struct *vma);
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int (*set_filter)(struct gk20a *g,
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int (*set_filter)(struct gk20a *g,
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struct nvgpu_ctxsw_trace_filter *filter);
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struct nvgpu_gpu_ctxsw_trace_filter *filter);
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} fecs_trace;
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} fecs_trace;
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#endif
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#endif
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struct {
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struct {
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@@ -44,6 +44,15 @@ struct channel_gk20a;
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#define NVGPU_GPU_CTXSW_TAG_LAST \
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#define NVGPU_GPU_CTXSW_TAG_LAST \
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NVGPU_GPU_CTXSW_TAG_INVALID_TIMESTAMP
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NVGPU_GPU_CTXSW_TAG_INVALID_TIMESTAMP
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#define NVGPU_GPU_CTXSW_FILTER_ISSET(n, p) \
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((p)->tag_bits[(n) / 64] & (1 << ((n) & 63)))
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#define NVGPU_GPU_CTXSW_FILTER_SIZE (NVGPU_GPU_CTXSW_TAG_LAST + 1)
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struct nvgpu_gpu_ctxsw_trace_filter {
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u64 tag_bits[(NVGPU_GPU_CTXSW_FILTER_SIZE + 63) / 64];
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};
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/*
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/*
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* The binary format of 'struct nvgpu_gpu_ctxsw_trace_entry' introduced here
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* The binary format of 'struct nvgpu_gpu_ctxsw_trace_entry' introduced here
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* should match that of 'struct nvgpu_ctxsw_trace_entry' defined in uapi
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* should match that of 'struct nvgpu_ctxsw_trace_entry' defined in uapi
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@@ -46,7 +46,7 @@ struct gk20a_ctxsw_dev {
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struct nvgpu_ctxsw_ring_header *hdr;
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struct nvgpu_ctxsw_ring_header *hdr;
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struct nvgpu_gpu_ctxsw_trace_entry *ents;
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struct nvgpu_gpu_ctxsw_trace_entry *ents;
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struct nvgpu_ctxsw_trace_filter filter;
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struct nvgpu_gpu_ctxsw_trace_filter filter;
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bool write_enabled;
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bool write_enabled;
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struct nvgpu_cond readout_wq;
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struct nvgpu_cond readout_wq;
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size_t size;
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size_t size;
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@@ -244,13 +244,25 @@ static int gk20a_ctxsw_dev_ioctl_ring_setup(struct gk20a_ctxsw_dev *dev,
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return ret;
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return ret;
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}
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}
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static void nvgpu_set_ctxsw_trace_filter_args(struct nvgpu_gpu_ctxsw_trace_filter *filter_dst,
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struct nvgpu_ctxsw_trace_filter *filter_src)
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{
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memcpy(filter_dst->tag_bits, filter_src->tag_bits, (NVGPU_CTXSW_FILTER_SIZE + 63) / 64);
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}
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static void nvgpu_get_ctxsw_trace_filter_args(struct nvgpu_ctxsw_trace_filter *filter_dst,
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struct nvgpu_gpu_ctxsw_trace_filter *filter_src)
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{
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memcpy(filter_dst->tag_bits, filter_src->tag_bits, (NVGPU_CTXSW_FILTER_SIZE + 63) / 64);
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}
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static int gk20a_ctxsw_dev_ioctl_set_filter(struct gk20a_ctxsw_dev *dev,
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static int gk20a_ctxsw_dev_ioctl_set_filter(struct gk20a_ctxsw_dev *dev,
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struct nvgpu_ctxsw_trace_filter_args *args)
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struct nvgpu_ctxsw_trace_filter_args *args)
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{
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{
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struct gk20a *g = dev->g;
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struct gk20a *g = dev->g;
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nvgpu_mutex_acquire(&dev->write_lock);
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nvgpu_mutex_acquire(&dev->write_lock);
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dev->filter = args->filter;
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nvgpu_set_ctxsw_trace_filter_args(&dev->filter, &args->filter);
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nvgpu_mutex_release(&dev->write_lock);
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nvgpu_mutex_release(&dev->write_lock);
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if (g->ops.fecs_trace.set_filter)
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if (g->ops.fecs_trace.set_filter)
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@@ -262,7 +274,7 @@ static int gk20a_ctxsw_dev_ioctl_get_filter(struct gk20a_ctxsw_dev *dev,
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struct nvgpu_ctxsw_trace_filter_args *args)
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struct nvgpu_ctxsw_trace_filter_args *args)
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{
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{
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nvgpu_mutex_acquire(&dev->write_lock);
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nvgpu_mutex_acquire(&dev->write_lock);
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args->filter = dev->filter;
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nvgpu_get_ctxsw_trace_filter_args(&args->filter, &dev->filter);
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nvgpu_mutex_release(&dev->write_lock);
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nvgpu_mutex_release(&dev->write_lock);
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return 0;
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return 0;
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@@ -650,7 +662,7 @@ int gk20a_ctxsw_trace_write(struct gk20a *g,
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goto drop;
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goto drop;
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}
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}
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if (!NVGPU_CTXSW_FILTER_ISSET(entry->tag, &dev->filter)) {
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if (!NVGPU_GPU_CTXSW_FILTER_ISSET(entry->tag, &dev->filter)) {
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reason = "filtered out";
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reason = "filtered out";
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goto filter;
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goto filter;
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}
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}
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@@ -190,7 +190,7 @@ int vgpu_mmap_user_buffer(struct gk20a *g, struct vm_area_struct *vma)
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#ifdef CONFIG_GK20A_CTXSW_TRACE
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#ifdef CONFIG_GK20A_CTXSW_TRACE
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int vgpu_fecs_trace_max_entries(struct gk20a *g,
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int vgpu_fecs_trace_max_entries(struct gk20a *g,
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struct nvgpu_ctxsw_trace_filter *filter)
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struct nvgpu_gpu_ctxsw_trace_filter *filter)
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{
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{
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struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
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struct vgpu_fecs_trace *vcst = (struct vgpu_fecs_trace *)g->fecs_trace;
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@@ -202,7 +202,7 @@ int vgpu_fecs_trace_max_entries(struct gk20a *g,
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#endif
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#endif
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int vgpu_fecs_trace_set_filter(struct gk20a *g,
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int vgpu_fecs_trace_set_filter(struct gk20a *g,
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struct nvgpu_ctxsw_trace_filter *filter)
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struct nvgpu_gpu_ctxsw_trace_filter *filter)
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{
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{
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struct tegra_vgpu_cmd_msg msg = {
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struct tegra_vgpu_cmd_msg msg = {
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.cmd = TEGRA_VGPU_CMD_FECS_TRACE_SET_FILTER,
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.cmd = TEGRA_VGPU_CMD_FECS_TRACE_SET_FILTER,
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@@ -27,7 +27,7 @@
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struct gk20a;
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struct gk20a;
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struct vm_area_struct;
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struct vm_area_struct;
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struct nvgpu_ctxsw_trace_filter;
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struct nvgpu_gpu_ctxsw_trace_filter;
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void vgpu_fecs_trace_data_update(struct gk20a *g);
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void vgpu_fecs_trace_data_update(struct gk20a *g);
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int vgpu_fecs_trace_init(struct gk20a *g);
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int vgpu_fecs_trace_init(struct gk20a *g);
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@@ -40,8 +40,8 @@ int vgpu_alloc_user_buffer(struct gk20a *g, void **buf, size_t *size);
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int vgpu_free_user_buffer(struct gk20a *g);
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int vgpu_free_user_buffer(struct gk20a *g);
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int vgpu_mmap_user_buffer(struct gk20a *g, struct vm_area_struct *vma);
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int vgpu_mmap_user_buffer(struct gk20a *g, struct vm_area_struct *vma);
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int vgpu_fecs_trace_max_entries(struct gk20a *g,
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int vgpu_fecs_trace_max_entries(struct gk20a *g,
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struct nvgpu_ctxsw_trace_filter *filter);
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struct nvgpu_gpu_ctxsw_trace_filter *filter);
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int vgpu_fecs_trace_set_filter(struct gk20a *g,
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int vgpu_fecs_trace_set_filter(struct gk20a *g,
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struct nvgpu_ctxsw_trace_filter *filter);
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struct nvgpu_gpu_ctxsw_trace_filter *filter);
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#endif /* __FECS_TRACE_VGPU_H */
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#endif /* __FECS_TRACE_VGPU_H */
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