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gpu: nvgpu: whitelist MISRA violations due to true/false bug

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Whitelist false positive violations cause by a Coverity bug that
misinterprets "true" and "false" as integers. See nvbug 2623654 for
details on the bug.

JIRA NVGPU-4031

Change-Id: Id144eac1d23be5cfaba73322c3e89c76b5664d6c
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2203976
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Philip Elcan
2019-09-23 16:13:41 -04:00
committed by Alex Waterman
parent 2a205f6aeb
commit 7f87599df9
3 changed files with 5 additions and 0 deletions
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2
drivers/gpu/nvgpu/common/mm/gmmu/page_table.c
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@@ -45,6 +45,7 @@
} else { \
nvgpu_log(g, gpu_dbg_map, fmt, ##args); \
} \
NVGPU_COV_WHITELIST(false_positive, NVGPU_MISRA(Rule, 14_4), "Bug 2623654") \
} while (false)
#define nvgpu_gmmu_dbg_v(g, attrs, fmt, args...) \
@@ -54,6 +55,7 @@
} else { \
nvgpu_log(g, gpu_dbg_map_v, fmt, ##args); \
} \
NVGPU_COV_WHITELIST(false_positive, NVGPU_MISRA(Rule, 14_4), "Bug 2623654") \
} while (false)
static int pd_allocate(struct vm_gk20a *vm,