gpu: nvgpu: Set GPC PLL id in platform probe

Set GPC PLL id in Tegra platform probe, to match Tegra SoC.

Bug 1851797
Bug 1867980

Change-Id: Ie6d2625a0009bcb96511aeda8c5af4734cf04929
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/1461698
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Alex Frid
2017-04-12 13:33:26 -07:00
committed by mobile promotions
parent e8e33f4f05
commit 7ff9bb2c71
2 changed files with 11 additions and 3 deletions

View File

@@ -24,6 +24,9 @@
enum {
/* only one PLL for gk20a */
GK20A_GPC_PLL = 0,
/* 2 PLL revisions for gm20b */
GM20B_GPC_PLL_B1,
GM20B_GPC_PLL_C1,
};
enum gpc_pll_mode {

View File

@@ -943,15 +943,20 @@ static int gk20a_tegra_probe(struct device *dev)
platform->can_railgate = false;
}
/* WAR for bug 1547668: Disable railgating and scaling irrespective of
* platform data if the rework has not been made. */
platform->g->clk.gpc_pll.id = GK20A_GPC_PLL;
if (tegra_get_chip_id() == TEGRA210) {
/* WAR for bug 1547668: Disable railgating and scaling
irrespective of platform data if the rework was not made. */
np = of_find_node_by_path("/gpu-dvfs-rework");
if (!(np && of_device_is_available(np))) {
platform->devfreq_governor = "";
dev_warn(dev, "board does not support scaling");
}
platform->g->clk.gpc_pll.id = GM20B_GPC_PLL_B1;
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0))
if (tegra_chip_get_revision() > TEGRA210_REVISION_A04p)
platform->g->clk.gpc_pll.id = GM20B_GPC_PLL_C1;
#endif
}
if (tegra_get_chip_id() == TEGRA132)