gpu: nvgpu: make nvgpu_gr_subctx a priv struct

Make struct nvgpu_gr_subctx a private struct and add
an api to access subctx header.

JIRA NVGPU-3060

Change-Id: Ia1f0471084f90eddd31ddc6869bd767866f9b4e2
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2088531
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Nitin Kumbhar
2019-04-03 13:40:47 +05:30
committed by mobile promotions
parent 7ea63fbe0b
commit 82b5f356d0
6 changed files with 49 additions and 7 deletions

View File

@@ -608,7 +608,7 @@ int nvgpu_gr_fecs_trace_bind_channel(struct gk20a *g,
GK20A_FECS_TRACE_NUM_RECORDS);
if (nvgpu_is_enabled(g, NVGPU_FECS_TRACE_VA) && subctx != NULL) {
mem = &subctx->ctx_header;
mem = nvgpu_gr_subctx_get_ctx_header(g, subctx);
}
g->ops.gr.ctxsw_prog.set_ts_buffer_ptr(g, mem, addr, aperture_mask);

View File

@@ -25,6 +25,8 @@
#include <nvgpu/gr/ctx.h>
#include <nvgpu/gmmu.h>
#include "common/gr/subctx_priv.h"
struct nvgpu_gr_subctx *nvgpu_gr_subctx_alloc(struct gk20a *g,
struct vm_gk20a *vm)
{
@@ -145,3 +147,9 @@ void nvgpu_gr_subctx_set_preemption_buffer_va(struct gk20a *g,
}
}
struct nvgpu_mem *nvgpu_gr_subctx_get_ctx_header(struct gk20a *g,
struct nvgpu_gr_subctx *subctx)
{
return &subctx->ctx_header;
}

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@@ -0,0 +1,32 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_GR_SUBCTX_PRIV_H
#define NVGPU_GR_SUBCTX_PRIV_H
struct nvgpu_mem;
struct nvgpu_gr_subctx {
struct nvgpu_mem ctx_header;
};
#endif /* NVGPU_GR_SUBCTX_PRIV_H */

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@@ -25,6 +25,8 @@
#include <nvgpu/gk20a.h>
#include <nvgpu/gr/subctx.h>
#include "common/gr/subctx_priv.h"
#include "subctx_vgpu.h"
#include "common/vgpu/ivc/comm_vgpu.h"

View File

@@ -1769,7 +1769,7 @@ int gr_gv11b_commit_inst(struct channel_gk20a *c, u64 gpu_va)
nvgpu_gr_subctx_load_ctx_header(g, c->subctx, tsg->gr_ctx, gpu_va);
ctxheader = &c->subctx->ctx_header;
ctxheader = nvgpu_gr_subctx_get_ctx_header(g, c->subctx);
g->ops.ramin.set_gr_ptr(g, &c->inst_block, ctxheader->gpu_va);
return 0;

View File

@@ -24,14 +24,11 @@
#define NVGPU_GR_SUBCTX_H
#include <nvgpu/types.h>
#include <nvgpu/nvgpu_mem.h>
struct gk20a;
struct vm_gk20a;
struct nvgpu_gr_subctx {
struct nvgpu_mem ctx_header;
};
struct nvgpu_gr_subctx;
struct nvgpu_mem;
struct nvgpu_gr_subctx *nvgpu_gr_subctx_alloc(struct gk20a *g,
struct vm_gk20a *vm);
@@ -55,4 +52,7 @@ void nvgpu_gr_subctx_set_patch_ctx(struct gk20a *g,
void nvgpu_gr_subctx_set_preemption_buffer_va(struct gk20a *g,
struct nvgpu_gr_subctx *subctx, struct nvgpu_gr_ctx *gr_ctx);
struct nvgpu_mem *nvgpu_gr_subctx_get_ctx_header(struct gk20a *g,
struct nvgpu_gr_subctx *subctx);
#endif /* NVGPU_GR_SUBCTX_H */