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gpu: nvgpu: initialize ctx state for each GR instance
Execute nvgpu_gr_init_ctx_state() for each GR instance. Move it under gr_init_ctxsw_falcon_support() which is already executed for each instance. Update the API to accept struct nvgpu_gr pointer for convenience. API does not need to know about other instances. For reset path, continue using g->gr instead of specific instance. This will be revisited when entire reset path is refactored. Jira NVGPU-5648 Change-Id: I8879bf3b44bb01f6b8053f1aecbd550f49837520 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2409535 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Antony Clince Alex <aalex@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Alex Waterman
parent
8d2cb311cb
commit
83691e088f
@@ -402,12 +402,12 @@ static int gr_init_config(struct gk20a *g)
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return 0;
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}
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static int nvgpu_gr_init_ctx_state(struct gk20a *g)
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static int nvgpu_gr_init_ctx_state(struct gk20a *g, struct nvgpu_gr *gr)
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{
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int err = 0;
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/* Initialize ctx state during boot and recovery */
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err = nvgpu_gr_falcon_init_ctx_state(g, g->gr->falcon);
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err = nvgpu_gr_falcon_init_ctx_state(g, gr->falcon);
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if (err != 0) {
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nvgpu_err(g, "gr ctx_state init failed");
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}
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@@ -716,9 +716,12 @@ int nvgpu_gr_reset(struct gk20a *g)
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nvgpu_mutex_release(fecs_mutex);
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/* this appears query for sw states but fecs actually init
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ramchain, etc so this is hw init */
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err = nvgpu_gr_init_ctx_state(g);
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/*
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* This appears query for sw states but fecs actually inits
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* ramchain, etc so this is hw init. Hence should be executed
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* for every GR engine HW initialization.
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*/
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err = nvgpu_gr_init_ctx_state(g, g->gr);
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if (err != 0) {
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return err;
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}
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@@ -771,6 +774,16 @@ static int gr_init_ctxsw_falcon_support(struct gk20a *g)
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return err;
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}
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/*
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* This appears query for sw states but fecs actually inits
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* ramchain, etc so this is hw init. Hence should be executed
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* for every GR engine HW initialization.
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*/
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err = nvgpu_gr_init_ctx_state(g, gr);
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if (err != 0) {
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return err;
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}
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return 0;
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}
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@@ -808,13 +821,6 @@ int nvgpu_gr_init_support(struct gk20a *g)
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return err;
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}
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/* this appears query for sw states but fecs actually init
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ramchain, etc so this is hw init */
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err = nvgpu_gr_init_ctx_state(g);
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if (err != 0) {
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return err;
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}
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#ifdef CONFIG_NVGPU_POWER_PG
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if (g->can_elpg) {
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err = nvgpu_gr_falcon_bind_fecs_elpg(g);
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