gpu: nvgpu: Remove TPC powergate from safety build

- Remove non-safe TPC powergate feature from the safety
  build by introducing a new flag:
  CONFIG_NVGPU_TPC_POWERGATE

- Move nvgpu_init_power_gate_gr() under same compile time flag.
  and move HAL function gr_gv11b_powergate_tpc() to tpc_gv11b.c

- Also, remove the negative test scenario and
  usage of tpc_powergate from unit tests

JIRA NVGPU-4149

Change-Id: If489482401e94de499e472b16b1bc091b00992e6
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2242323
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Divya Singhatwaria
2019-11-19 15:12:55 +05:30
committed by Alex Waterman
parent 836abc253d
commit 84a24c9593
14 changed files with 57 additions and 55 deletions

View File

@@ -615,9 +615,12 @@ struct gpu_ops {
void (*falcon_setup_boot_config)(struct gk20a *g);
int (*gsp_reset)(struct gk20a *g);
} gsp;
#ifdef CONFIG_NVGPU_TPC_POWERGATE
struct {
int (*tpc_powergate)(struct gk20a *g, u32 fuse_status);
int (*init_tpc_powergate)(struct gk20a *g, u32 fuse_status);
void (*tpc_gr_pg)(struct gk20a *g);
} tpc;
#endif
void (*semaphore_wakeup)(struct gk20a *g, bool post_events);
};

View File

@@ -1028,7 +1028,6 @@ struct gops_gr {
u32 *gpc_num, u32 *tpc_num);
u32 (*get_tpc_num)(struct gk20a *g, u32 addr);
u32 (*get_egpc_base)(struct gk20a *g);
void (*powergate_tpc)(struct gk20a *g);
int (*update_smpc_ctxsw_mode)(struct gk20a *g,
struct nvgpu_channel *c,
bool enable);