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gpu: nvgpu: Add thermal module support

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The following CL contains the following VBIOS thermal table parsing
and PMU interface support.
1) Thermal device table
2) Thermal channel table

JIRA DNVGPU-130

Change-Id: I3c1baca3fec2727b6d20aa6c007096372a6a3efe
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1240631
(cherry picked from commit 1d6fa9ab49b1c84e7f845de206821d879cbda356)
Reviewed-on: http://git-master/r/1246204
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Lakshmanan M
2016-10-21 17:00:50 +05:30
committed by mobile promotions
parent d37a573c45
commit 8531eb6df1
5 changed files with 105 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
drivers/gpu/nvgpu/ctrl/ctrltherm.h Normal file
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@@ -0,0 +1,24 @@
/*
* Control thermal infrastructure
*
* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#ifndef _ctrltherm_h_
#define _ctrltherm_h_
#include "ctrlboardobj.h"
#define CTRL_THERMAL_THERM_DEVICE_CLASS_GPU 0x01
#define CTRL_THERMAL_THERM_CHANNEL_CLASS_DEVICE 0x01
#endif

2
drivers/gpu/nvgpu/gk20a/gk20a.h
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@@ -58,6 +58,7 @@ struct acr_desc;
#include "clk/clk.h" #include "clk/clk.h"
#include "perf/perf.h" #include "perf/perf.h"
#include "pmgr/pmgr.h" #include "pmgr/pmgr.h"
#include "therm/thrm.h"
#endif #endif
#include "gm206/bios_gm206.h" #include "gm206/bios_gm206.h"
@@ -793,6 +794,7 @@ struct gk20a {
struct clk_pmupstate clk_pmu; struct clk_pmupstate clk_pmu;
struct perf_pmupstate perf_pmu; struct perf_pmupstate perf_pmu;
struct pmgr_pmupstate pmgr_pmu; struct pmgr_pmupstate pmgr_pmu;
struct therm_pmupstate therm_pmu;
#endif #endif
#ifdef CONFIG_DEBUG_FS #ifdef CONFIG_DEBUG_FS

1
drivers/gpu/nvgpu/gk20a/pmu_gk20a.h
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@@ -181,6 +181,7 @@ struct pmu_ucode_desc_v1 {
#define PMU_UNIT_RC (0x1F) #define PMU_UNIT_RC (0x1F)
#define PMU_UNIT_FECS_MEM_OVERRIDE (0x1E) #define PMU_UNIT_FECS_MEM_OVERRIDE (0x1E)
#define PMU_UNIT_CLK (0x0D) #define PMU_UNIT_CLK (0x0D)
#define PMU_UNIT_THERM (0x14)
#define PMU_UNIT_PMGR (0x18) #define PMU_UNIT_PMGR (0x18)
#define PMU_UNIT_VOLT (0x0E) #define PMU_UNIT_VOLT (0x0E)

1
drivers/gpu/nvgpu/gm206/bios_gm206.h
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@@ -40,6 +40,7 @@ enum {
POWER_SENSORS_TABLE = 0xA, POWER_SENSORS_TABLE = 0xA,
POWER_CAPPING_TABLE = 0xB, POWER_CAPPING_TABLE = 0xB,
POWER_TOPOLOGY_TABLE = 0xF, POWER_TOPOLOGY_TABLE = 0xF,
THERMAL_CHANNEL_TABLE = 0x12,
VOLTAGE_RAIL_TABLE = 26, VOLTAGE_RAIL_TABLE = 26,
VOLTAGE_DEVICE_TABLE, VOLTAGE_DEVICE_TABLE,
VOLTAGE_POLICY_TABLE, VOLTAGE_POLICY_TABLE,

77
drivers/gpu/nvgpu/pmuif/gpmuifthermsensor.h Normal file
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@@ -0,0 +1,77 @@
/*
* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#ifndef _GPMUIFTHERMSENSOR_H_
#define _GPMUIFTHERMSENSOR_H_
#include "gk20a/gk20a.h"
#include "gk20a/pmu_gk20a.h"
#include "ctrl/ctrltherm.h"
#include "pmuif/gpmuifboardobj.h"
#include "gk20a/pmu_common.h"
#define NV_PMU_THERM_BOARDOBJGRP_CLASS_ID_THERM_DEVICE 0x00
#define NV_PMU_THERM_BOARDOBJGRP_CLASS_ID_THERM_CHANNEL 0x01
#define NV_PMU_THERM_CMD_ID_BOARDOBJ_GRP_SET 0x0000000B
#define NV_PMU_THERM_MSG_ID_BOARDOBJ_GRP_SET 0x00000008
struct nv_pmu_therm_therm_device_boardobjgrp_set_header {
struct nv_pmu_boardobjgrp_e32 super;
};
struct nv_pmu_therm_therm_device_boardobj_set {
struct nv_pmu_boardobj super;
};
struct nv_pmu_therm_therm_device_i2c_boardobj_set {
struct nv_pmu_therm_therm_device_boardobj_set super;
u8 i2c_dev_idx;
};
union nv_pmu_therm_therm_device_boardobj_set_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_therm_therm_device_boardobj_set therm_device;
struct nv_pmu_therm_therm_device_i2c_boardobj_set i2c;
};
NV_PMU_BOARDOBJ_GRP_SET_MAKE_E32(therm, therm_device);
struct nv_pmu_therm_therm_channel_boardobjgrp_set_header {
struct nv_pmu_boardobjgrp_e32 super;
};
struct nv_pmu_therm_therm_channel_boardobj_set {
struct nv_pmu_boardobj super;
s16 scaling;
s16 offset;
s32 temp_min;
s32 temp_max;
};
struct nv_pmu_therm_therm_channel_device_boardobj_set {
struct nv_pmu_therm_therm_channel_boardobj_set super;
u8 therm_dev_idx;
u8 therm_dev_prov_idx;
};
union nv_pmu_therm_therm_channel_boardobj_set_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_therm_therm_channel_boardobj_set therm_channel;
struct nv_pmu_therm_therm_channel_device_boardobj_set device;
};
NV_PMU_BOARDOBJ_GRP_SET_MAKE_E32(therm, therm_channel);
#endif