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gpu: nvgpu: Add fix for DVCO Min

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Currently DVCO Min is set to 0 in VBIOS.
This is causing few boards in GVS to fail when it tries to
program min gpcclk freq for dgpu using post divider.
This patch makes 405MHz is the lowest gpcclk freq instead of 0.
Once VBIOS is updated with 405MHz min freq this fix can be reverted.

Bug 3032643

Change-Id: I880c4d2b835cfee87d117010be12a91c64e9cd23
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2367461
Signed-off-by: Prateek sethi <prsethi@nvidia.com>
(cherry picked from commit d3061891ee031059ce791b34f5e40f969db0d89e)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2370512
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Abdul Salam
2020-06-26 23:13:46 +05:30
committed by Alex Waterman
parent b117f40f6c
commit 877e20838c
2 changed files with 13 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
drivers/gpu/nvgpu/common/clk_arb/clk_arb_gv100.c
View File

@@ -91,7 +91,16 @@ int gv100_get_arbiter_clk_range(struct gk20a *g, u32 api_domain,
gpcclk_cap_mhz = p0_info->max_mhz;
max_min_freq_mhz = nvgpu_pmu_clk_fll_get_min_max_freq(g);
/* WAR for DVCO min */
/*
* When DVCO min is 0 in vbios update it to DVCO_MIN_DEFAULT_MHZ.
*/
if (max_min_freq_mhz == 0U) {
max_min_freq_mhz = DVCO_MIN_DEFAULT_MHZ;
}
/*
* Needed for DVCO min.
*/
if (api_domain == CTRL_CLK_DOMAIN_GPCCLK) {
if ((max_min_freq_mhz != 0U) &&
(max_min_freq_mhz >= limit_min_mhz)) {

4
drivers/gpu/nvgpu/common/clk_arb/clk_arb_gv100.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -25,6 +25,8 @@
struct nvgpu_clk_session;
struct nvgpu_clk_arb;
#define DVCO_MIN_DEFAULT_MHZ 405
bool gv100_check_clk_arb_support(struct gk20a *g);
u32 gv100_get_arbiter_clk_domains(struct gk20a *g);
int gv100_get_arbiter_f_points(struct gk20a *g,u32 api_domain,