gpu: nvgpu: pbdma_status in preempt poll

gm20b_pbdma_handle_intr is only initializing pbdma_status
when either pbdma_intr_0 or pbdma_intr_1 is pending.
This could lead to using non-initialized chsw_status in
gv11b_fifo_preempt_poll_pbdma, and causing unexpected
failures in unit tests.

Read pbdma_status before checking for pbdma interrupts,
to make sure pbdma_status contains valid data.

Jira NVGPU-4887

Change-Id: If1bdb24ae04b58e85e4217c9c0854c01ca65525b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2279111
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2020-01-14 16:05:37 -05:00
committed by Alex Waterman
parent 652cff2cd0
commit 87abec1ed9
2 changed files with 5 additions and 1 deletions

View File

@@ -197,6 +197,10 @@ int gv11b_fifo_preempt_poll_pbdma(struct gk20a *g, u32 tsgid,
}
loop_count++;
}
g->ops.pbdma_status.read_pbdma_status_info(g,
pbdma_id, &pbdma_status);
/*
* If the PBDMA has a stalling interrupt and receives a NACK,
* the PBDMA won't save out until the STALLING interrupt is

View File

@@ -35,7 +35,7 @@ struct nvgpu_debug_context;
struct gops_pbdma_status {
void (*read_pbdma_status_info)(struct gk20a *g,
u32 engine_id, struct nvgpu_pbdma_status_info *status);
u32 pbdma_id, struct nvgpu_pbdma_status_info *status);
};
struct gops_pbdma {