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gpu: nvgpu: Add nvdec falcon support

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- Added "nvgpu_flacon  nvdec_flcn" member to gk20a
 - Added base address & flacon id of NVDEC falcon
 - Included nvdec falcon to access common falcon code
 - Enabled nvdec falcon support for GP106
 - Disabled nvdec falcon support for iGPU
 - Made call to enable nvdec falcon support if supported

Change-Id: Ia928d082275a720e4e8c6852384e489c8ec444f8
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
(cherry picked from commit 3d80aeff295bad8365af6022555ad151f1a32cf6)
Reviewed-on: https://git-master.nvidia.com/r/1564305
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mahantesh Kumbar
2017-09-20 14:12:01 +05:30
committed by mobile promotions
parent 5ff6ebd2f4
commit 8882014731
6 changed files with 18 additions and 0 deletions
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4
drivers/gpu/nvgpu/common/falcon/falcon.c
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@@ -321,6 +321,10 @@ void nvgpu_flcn_sw_init(struct gk20a *g, u32 flcn_id)
flcn = &g->gpccs_flcn;
flcn->flcn_id = flcn_id;
break;
case FALCON_ID_NVDEC:
flcn = &g->nvdec_flcn;
flcn->flcn_id = flcn_id;
break;
default:
nvgpu_err(g, "Invalid/Unsupported falcon ID %x", flcn_id);
break;

5
drivers/gpu/nvgpu/gk20a/flcn_gk20a.c
View File

@@ -641,6 +641,11 @@ void gk20a_falcon_hal_sw_init(struct nvgpu_falcon *flcn)
flcn->is_falcon_supported = true;
flcn->is_interrupt_enabled = false;
break;
case FALCON_ID_NVDEC:
flcn->flcn_base = FALCON_NVDEC_BASE;
flcn->is_falcon_supported = false;
flcn->is_interrupt_enabled = false;
break;
default:
flcn->is_falcon_supported = false;
nvgpu_err(g, "Invalid flcn request");

1
drivers/gpu/nvgpu/gk20a/gk20a.c
View File

@@ -164,6 +164,7 @@ int gk20a_finalize_poweron(struct gk20a *g)
/* init interface layer support for PMU falcon */
nvgpu_flcn_sw_init(g, FALCON_ID_PMU);
nvgpu_flcn_sw_init(g, FALCON_ID_SEC2);
nvgpu_flcn_sw_init(g, FALCON_ID_NVDEC);
if (g->ops.bios.init)
err = g->ops.bios.init(g);

1
drivers/gpu/nvgpu/gk20a/gk20a.h
View File

@@ -1075,6 +1075,7 @@ struct gk20a {
struct nvgpu_falcon sec2_flcn;
struct nvgpu_falcon fecs_flcn;
struct nvgpu_falcon gpccs_flcn;
struct nvgpu_falcon nvdec_flcn;
struct clk_gk20a clk;
struct fifo_gk20a fifo;
struct gr_gk20a gr;

5
drivers/gpu/nvgpu/gp106/flcn_gp106.c
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@@ -74,6 +74,11 @@ void gp106_falcon_hal_sw_init(struct nvgpu_falcon *flcn)
flcn->is_falcon_supported = true;
flcn->is_interrupt_enabled = false;
break;
case FALCON_ID_NVDEC:
flcn->flcn_base = FALCON_NVDEC_BASE;
flcn->is_falcon_supported = true;
flcn->is_interrupt_enabled = true;
break;
default:
flcn->is_falcon_supported = false;
nvgpu_err(g, "Invalid flcn request");

2
drivers/gpu/nvgpu/include/nvgpu/falcon.h
View File

@@ -32,11 +32,13 @@
#define FALCON_ID_PMU (0)
#define FALCON_ID_FECS (2)
#define FALCON_ID_GPCCS (3)
#define FALCON_ID_NVDEC (4)
#define FALCON_ID_SEC2 (7)
/*
* Falcon Base address Defines
*/
#define FALCON_NVDEC_BASE 0x00084000
#define FALCON_PWR_BASE 0x0010a000
#define FALCON_SEC_BASE 0x00087000
#define FALCON_FECS_BASE 0x00409000