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gpu: nvgpu: remove unused accessors

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Remove these unused accessors
fb_mmu_ctrl_vm_pg_size_f()
fb_mmu_ctrl_vm_pg_size_128kb_f()
fb_mmu_ctrl_vm_pg_size_64kb_f()
ram_rl_entry_tsg_timeslice_timeout_disable_v()

Bug 2173122

Change-Id: I5b18ab502265ed4575fceb4bd5d0ab07dd3c12a8
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1850945
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2018-09-28 13:27:32 +05:30
committed by mobile promotions
parent 1e125f245e
commit 894e04790b
7 changed files with 1 additions and 69 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_fb_gm20b.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -64,18 +64,6 @@ static inline u32 fb_mmu_ctrl_r(void)
{
return 0x00100c80U;
}
static inline u32 fb_mmu_ctrl_vm_pg_size_f(u32 v)
{
return (v & 0x1U) << 0U;
}
static inline u32 fb_mmu_ctrl_vm_pg_size_128kb_f(void)
{
return 0x0U;
}
static inline u32 fb_mmu_ctrl_vm_pg_size_64kb_f(void)
{
return 0x1U;
}
static inline u32 fb_mmu_ctrl_pri_fifo_empty_v(u32 r)
{
return (r >> 15U) & 0x1U;

12
drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_fb_gp106.h
View File

@@ -64,18 +64,6 @@ static inline u32 fb_mmu_ctrl_r(void)
{
return 0x00100c80U;
}
static inline u32 fb_mmu_ctrl_vm_pg_size_f(u32 v)
{
return (v & 0x1U) << 0U;
}
static inline u32 fb_mmu_ctrl_vm_pg_size_128kb_f(void)
{
return 0x0U;
}
static inline u32 fb_mmu_ctrl_vm_pg_size_64kb_f(void)
{
return 0x1U;
}
static inline u32 fb_mmu_ctrl_pri_fifo_empty_v(u32 r)
{
return (r >> 15U) & 0x1U;

12
drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_fb_gp10b.h
View File

@@ -64,18 +64,6 @@ static inline u32 fb_mmu_ctrl_r(void)
{
return 0x00100c80U;
}
static inline u32 fb_mmu_ctrl_vm_pg_size_f(u32 v)
{
return (v & 0x1U) << 0U;
}
static inline u32 fb_mmu_ctrl_vm_pg_size_128kb_f(void)
{
return 0x0U;
}
static inline u32 fb_mmu_ctrl_vm_pg_size_64kb_f(void)
{
return 0x1U;
}
static inline u32 fb_mmu_ctrl_pri_fifo_empty_v(u32 r)
{
return (r >> 15U) & 0x1U;

12
drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_fb_gv100.h
View File

@@ -140,18 +140,6 @@ static inline u32 fb_mmu_ctrl_r(void)
{
return 0x00100c80U;
}
static inline u32 fb_mmu_ctrl_vm_pg_size_f(u32 v)
{
return (v & 0x1U) << 0U;
}
static inline u32 fb_mmu_ctrl_vm_pg_size_128kb_f(void)
{
return 0x0U;
}
static inline u32 fb_mmu_ctrl_vm_pg_size_64kb_f(void)
{
return 0x1U;
}
static inline u32 fb_mmu_ctrl_pri_fifo_empty_v(u32 r)
{
return (r >> 15U) & 0x1U;

4
drivers/gpu/nvgpu/include/nvgpu/hw/gv100/hw_ram_gv100.h
View File

@@ -756,10 +756,6 @@ static inline u32 ram_rl_entry_tsg_timeslice_timeout_128_v(void)
{
return 0x00000080U;
}
static inline u32 ram_rl_entry_tsg_timeslice_timeout_disable_v(void)
{
return 0x00000000U;
}
static inline u32 ram_rl_entry_tsg_length_f(u32 v)
{
return (v & 0xffU) << 0U;

12
drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_fb_gv11b.h
View File

@@ -64,18 +64,6 @@ static inline u32 fb_mmu_ctrl_r(void)
{
return 0x00100c80U;
}
static inline u32 fb_mmu_ctrl_vm_pg_size_f(u32 v)
{
return (v & 0x1U) << 0U;
}
static inline u32 fb_mmu_ctrl_vm_pg_size_128kb_f(void)
{
return 0x0U;
}
static inline u32 fb_mmu_ctrl_vm_pg_size_64kb_f(void)
{
return 0x1U;
}
static inline u32 fb_mmu_ctrl_pri_fifo_empty_v(u32 r)
{
return (r >> 15U) & 0x1U;

4
drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_ram_gv11b.h
View File

@@ -756,10 +756,6 @@ static inline u32 ram_rl_entry_tsg_timeslice_timeout_128_v(void)
{
return 0x00000080U;
}
static inline u32 ram_rl_entry_tsg_timeslice_timeout_disable_v(void)
{
return 0x00000000U;
}
static inline u32 ram_rl_entry_tsg_length_f(u32 v)
{
return (v & 0xffU) << 0U;