gpu:nvgpu: Enable VF point in change seqencer

Mark b_vf_point_check_ignore to false as VF point is working
and we can use FR instead of FFR

Update PMU version to enable VF point support.
PMU fw from CL 25467803

JIRA NVGPU-1152

Change-Id: Ie34068dd075ea8c9548f45d7d6bd253077ed4485
Signed-off-by: Vaikundanathan S <vaikuns@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1972990
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Abdul Salam <absalam@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vaikundanathan S
2018-12-14 12:27:06 +05:30
committed by mobile promotions
parent 04a1fd312b
commit 89d421fb9c
2 changed files with 2 additions and 2 deletions

View File

@@ -41,7 +41,7 @@
#define NVGPU_PMU_NS_UCODE_IMAGE "gpmu_ucode.bin"
/* PMU F/W version */
#define APP_VERSION_TU10X 25110168U
#define APP_VERSION_TU10X 25453641U
#define APP_VERSION_GV11B 25005711U
#define APP_VERSION_GV10X 25133717U
#define APP_VERSION_GP10X 24076634U

View File

@@ -87,7 +87,7 @@ int nvgpu_perf_change_seq_sw_setup(struct gk20a *g)
/*exclude MCLK, may not be needed as MCLK is already fixed */
perf_change_seq_pmu->super.clk_domains_exclusion_mask.super.data[0]
= 0x04U;
perf_change_seq_pmu->b_vf_point_check_ignore = true;
perf_change_seq_pmu->b_vf_point_check_ignore = false;
perf_change_seq_pmu->b_lock = false;
perf_change_seq_pmu->cpu_step_id_mask = 0;
perf_change_seq_pmu->cpu_adverised_step_id_mask = 0;