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gpu: nvgpu: Update for gr config code coverage.

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Replace if statement with nvgpu_assert,this checking is just to
assure following division will not cause system crash.

Jira NVGPU-4531

Change-Id: I213882b56ccfd993066c58bc3fb6c47a6fd92d4a
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2264410
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
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This commit is contained in:
vinodg
2019-12-17 17:10:34 -08:00
committed by Alex Waterman
parent 569b781cb2
commit 8ab5e07d8f
1 changed files with 3 additions and 3 deletions
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6
drivers/gpu/nvgpu/hal/gr/config/gr_config_gv100_fusa.c
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@@ -198,10 +198,10 @@ static int gr_gr100_find_perf_reduction_rate_gpc(struct gk20a *g,
* ratio represents relative throughput of the GPC * ratio represents relative throughput of the GPC
*/ */
tpc_cnt = nvgpu_gr_config_get_gpc_tpc_count(gr_config, gpc_id); tpc_cnt = nvgpu_gr_config_get_gpc_tpc_count(gr_config, gpc_id);
if (tpc_cnt > 0U) { nvgpu_assert(tpc_cnt != 0U);
scg_gpc_pix_perf = nvgpu_safe_mult_u32(scale_factor,
scg_gpc_pix_perf = nvgpu_safe_mult_u32(scale_factor,
num_tpc_gpc[gpc_id]) / tpc_cnt; num_tpc_gpc[gpc_id]) / tpc_cnt;
}
if (*min_scg_gpc_pix_perf > scg_gpc_pix_perf) { if (*min_scg_gpc_pix_perf > scg_gpc_pix_perf) {
*min_scg_gpc_pix_perf = scg_gpc_pix_perf; *min_scg_gpc_pix_perf = scg_gpc_pix_perf;