gpu: nvgpu: MISRA 21.15 fixes to volt code

MISRA Rule 21.15 prohibits use of memcpy() with incompatible ptrs
to qualified/unqualified types.

To circumvent this issue we've introduced a new MISRA-compliant
nvgpu_memcpy() function.

This change switches all offending uses of memcpy() in volt/*.c code
over to use nvgpu_memcpy() with appropriate casts applied.

JIRA NVGPU-849

Change-Id: Ia58f6dddfead31fdd08361a17e6a15e0f0ed29b7
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1936179
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Scott Long
2018-10-25 23:53:32 -07:00
committed by mobile promotions
parent c64f9432b1
commit 8bf44618fe
3 changed files with 9 additions and 6 deletions

View File

@@ -28,6 +28,7 @@
#include <nvgpu/gk20a.h>
#include <nvgpu/boardobjgrp.h>
#include <nvgpu/boardobjgrp_e32.h>
#include <nvgpu/string.h>
#include "gp106/bios_gp106.h"
@@ -391,7 +392,7 @@ static u32 volt_get_volt_devices_table(struct gk20a *g,
goto done;
}
memcpy(&header, volt_device_table_ptr,
nvgpu_memcpy((u8 *)&header, volt_device_table_ptr,
sizeof(struct vbios_voltage_device_table_1x_header));
/* Read in the entries. */
@@ -399,7 +400,7 @@ static u32 volt_get_volt_devices_table(struct gk20a *g,
entry_offset = (volt_device_table_ptr + header.header_size +
(entry_idx * header.table_entry_size));
memcpy(&entry, entry_offset,
nvgpu_memcpy((u8 *)&entry, entry_offset,
sizeof(struct vbios_voltage_device_table_1x_entry));
if (entry.type == NV_VBIOS_VOLTAGE_DEVICE_1X_ENTRY_TYPE_PSV) {

View File

@@ -24,6 +24,7 @@
#include <nvgpu/gk20a.h>
#include <nvgpu/boardobjgrp.h>
#include <nvgpu/boardobjgrp_e32.h>
#include <nvgpu/string.h>
#include "gp106/bios_gp106.h"
#include "ctrl/ctrlvolt.h"
@@ -295,7 +296,7 @@ static int volt_get_volt_policy_table(struct gk20a *g,
goto done;
}
memcpy(&header, voltage_policy_table_ptr,
nvgpu_memcpy((u8 *)&header, voltage_policy_table_ptr,
sizeof(struct vbios_voltage_policy_table_1x_header));
/* Set Voltage Policy Table Index for Perf Core VF Sequence client. */
@@ -307,7 +308,7 @@ static int volt_get_volt_policy_table(struct gk20a *g,
entry_offset = (voltage_policy_table_ptr + header.header_size +
i * header.table_entry_size);
memcpy(&entry, entry_offset,
nvgpu_memcpy((u8 *)&entry, entry_offset,
sizeof(struct vbios_voltage_policy_table_1x_entry));
memset(&policy_type_data, 0x0, sizeof(policy_type_data));

View File

@@ -24,6 +24,7 @@
#include <nvgpu/gk20a.h>
#include <nvgpu/boardobjgrp.h>
#include <nvgpu/boardobjgrp_e32.h>
#include <nvgpu/string.h>
#include "gp106/bios_gp106.h"
#include "ctrl/ctrlvolt.h"
@@ -284,7 +285,7 @@ static int volt_get_volt_rail_table(struct gk20a *g,
goto done;
}
memcpy(&header, volt_rail_table_ptr,
nvgpu_memcpy((u8 *)&header, volt_rail_table_ptr,
sizeof(struct vbios_voltage_rail_table_1x_header));
pvolt_rail_metadata->volt_domain_hal = (u8)header.volt_domain_hal;
@@ -295,7 +296,7 @@ static int volt_get_volt_rail_table(struct gk20a *g,
memset(&rail_type_data, 0x0, sizeof(rail_type_data));
memcpy(&entry, entry_ptr,
nvgpu_memcpy((u8 *)&entry, entry_ptr,
sizeof(struct vbios_voltage_rail_table_1x_entry));
volt_domain = volt_rail_vbios_volt_domain_convert_to_internal(g,