mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 09:12:24 +03:00
gpu: nvgpu: Add host1x support
Add support for the upstream host1x driver with the 'Host1x/Tegra UAPI' series [0] applied. The host1x support is only enabled if the kernel configuration variable CONFIG_TEGRA_HOST1X_NEXT is set. Please note that the initial implementation only supports Tegra194. [0] https://patchwork.ozlabs.org/project/linux-tegra/list/?series=206532 Bug 3156385 Change-Id: If531a8b866b48ba5a2af021756a4b5d158b8d59a Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2429981 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: Sagar Kamble <skamble@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: automaticguardword <automaticguardword@nvidia.com> GVS: Gerrit_Virtual_Submit
This commit is contained in:
Jon Hunter
committed by
Alex Waterman
Alex Waterman
parent
18d1b1b536
commit
8c94013c4d
@@ -138,6 +138,7 @@ nvgpu_mem:
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nvhost:
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sources: [ os/linux/nvhost.c,
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os/linux/nvhost_common.c,
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os/linux/nvhost_host1x.c,
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os/linux/nvhost_priv.h ]
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nvlink:
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@@ -470,8 +470,15 @@ nvgpu-$(CONFIG_TEGRA_GK20A_NVHOST) += \
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os/linux/os_fence_syncpt.o
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endif
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ifeq ($(CONFIG_TEGRA_GK20A_NVHOST_HOST1X),y)
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nvgpu-$(CONFIG_TEGRA_GK20A_NVHOST) += \
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os/linux/nvhost_host1x.o
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else
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nvgpu-$(CONFIG_TEGRA_GK20A_NVHOST) += \
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os/linux/nvhost.o
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endif
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nvgpu-$(CONFIG_TEGRA_GK20A_NVHOST) += \
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os/linux/nvhost.o \
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os/linux/nvhost_common.o \
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hal/sync/syncpt_cmdbuf_gk20a.o \
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hal/sync/syncpt_cmdbuf_gv11b.o \
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@@ -69,6 +69,10 @@ CONFIG_NVGPU_FECS_TRACE := y
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ifdef CONFIG_TEGRA_GRHOST
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CONFIG_TEGRA_GK20A_NVHOST := y
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endif
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ifdef CONFIG_TEGRA_HOST1X_NEXT
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CONFIG_TEGRA_GK20A_NVHOST := y
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CONFIG_TEGRA_GK20A_NVHOST_HOST1X := y
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endif
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# Enable support for GPUs on PCIe bus.
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ifeq ($(CONFIG_PCI),y)
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@@ -185,6 +189,9 @@ endif
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ifeq ($(CONFIG_TEGRA_GK20A_NVHOST),y)
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ccflags-y += -DCONFIG_TEGRA_GK20A_NVHOST
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endif
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ifeq ($(CONFIG_TEGRA_GK20A_NVHOST_HOST1X),y)
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ccflags-y += -DCONFIG_TEGRA_GK20A_NVHOST_HOST1X
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endif
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ifeq ($(CONFIG_NVGPU_DGPU),y)
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ccflags-y += -DCONFIG_NVGPU_DGPU
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endif
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@@ -22,7 +22,7 @@
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef CONFIG_NVGPU_SYNCFD_NONE
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#if !defined(CONFIG_NVGPU_SYNCFD_NONE) && !defined(CONFIG_TEGRA_GK20A_NVHOST_HOST1X)
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#include <uapi/linux/nvhost_ioctl.h>
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#endif
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@@ -25,16 +25,28 @@
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#ifndef NVGPU_OS_FENCE_SYNCPT_H
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#define NVGPU_OS_FENCE_SYNCPT_H
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#if defined(CONFIG_TEGRA_GK20A_NVHOST_HOST1X)
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#include <linux/types.h>
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#endif
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#include <nvgpu/errno.h>
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struct nvgpu_os_fence;
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struct nvhost_ctrl_sync_fence_info;
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struct nvgpu_nvhost_dev;
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struct nvgpu_os_fence_syncpt {
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struct nvgpu_os_fence *fence;
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};
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#if defined(CONFIG_TEGRA_GK20A_NVHOST_HOST1X)
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struct nvhost_ctrl_sync_fence_info {
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__u32 id;
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__u32 thresh;
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};
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#else
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struct nvhost_ctrl_sync_fence_info;
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#endif
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#if defined(CONFIG_TEGRA_GK20A_NVHOST) && !defined(CONFIG_NVGPU_SYNCFD_NONE)
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int nvgpu_os_fence_syncpt_create(struct nvgpu_os_fence *fence_out,
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416
drivers/gpu/nvgpu/os/linux/nvhost_host1x.c
Normal file
416
drivers/gpu/nvgpu/os/linux/nvhost_host1x.c
Normal file
@@ -0,0 +1,416 @@
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/*
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* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/dma-fence.h>
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#include <linux/file.h>
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#include <linux/host1x-next.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/sync_file.h>
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#include <nvgpu/os_fence.h>
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#include <nvgpu/os_fence_syncpts.h>
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#include <nvgpu/nvhost.h>
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#include <nvgpu/gk20a.h>
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#include "nvhost_priv.h"
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#define TEGRA194_SYNCPT_PAGE_SIZE 0x1000
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#define TEGRA194_SYNCPT_SHIM_BASE 0x60000000
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#define TEGRA194_SYNCPT_SHIM_SIZE 0x00400000
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static const struct of_device_id host1x_match[] = {
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{ .compatible = "nvidia,tegra186-host1x", },
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{ .compatible = "nvidia,tegra194-host1x", },
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{},
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};
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int nvgpu_get_nvhost_dev(struct gk20a *g)
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{
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struct platform_device *host1x_pdev;
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struct device_node *np;
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np = of_find_matching_node(NULL, host1x_match);
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if (!np) {
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nvgpu_warn(g, "Failed to find host1x, syncpt support disabled");
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nvgpu_set_enabled(g, NVGPU_HAS_SYNCPOINTS, false);
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return 0;
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}
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host1x_pdev = of_find_device_by_node(np);
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if (!host1x_pdev) {
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nvgpu_warn(g, "host1x device not available");
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return -EPROBE_DEFER;
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}
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g->nvhost = nvgpu_kzalloc(g, sizeof(struct nvgpu_nvhost_dev));
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if (!g->nvhost)
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return -ENOMEM;
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g->nvhost->host1x_pdev = host1x_pdev;
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return 0;
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}
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int nvgpu_nvhost_module_busy_ext(struct nvgpu_nvhost_dev *nvhost_dev)
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{
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return 0;
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}
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void nvgpu_nvhost_module_idle_ext(struct nvgpu_nvhost_dev *nvhost_dev) { }
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void nvgpu_nvhost_debug_dump_device(struct nvgpu_nvhost_dev *nvhost_dev) { }
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const char *nvgpu_nvhost_syncpt_get_name(struct nvgpu_nvhost_dev *nvhost_dev,
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int id)
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{
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return NULL;
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}
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bool nvgpu_nvhost_syncpt_is_valid_pt_ext(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id)
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{
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struct host1x_syncpt *sp;
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struct host1x *host1x;
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host1x = platform_get_drvdata(nvhost_dev->host1x_pdev);
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if (WARN_ON(!host1x))
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return false;
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sp = host1x_syncpt_get_by_id_noref(host1x, id);
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if (!sp)
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return false;
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return true;
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}
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bool nvgpu_nvhost_syncpt_is_expired_ext(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id, u32 thresh)
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{
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struct host1x_syncpt *sp;
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struct host1x *host1x;
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host1x = platform_get_drvdata(nvhost_dev->host1x_pdev);
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if (WARN_ON(!host1x))
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return true;
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sp = host1x_syncpt_get_by_id_noref(host1x, id);
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if (WARN_ON(!sp))
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return true;
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if (host1x_syncpt_wait(sp, thresh, 0, NULL))
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return false;
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return true;
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}
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struct nvgpu_host1x_cb {
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struct dma_fence_cb cb;
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void (*notifier)(void *, int);
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void *notifier_data;
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};
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static void nvgpu_host1x_cb_func(struct dma_fence *f, struct dma_fence_cb *cb)
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{
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struct nvgpu_host1x_cb *host1x_cb;
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host1x_cb = container_of(cb, struct nvgpu_host1x_cb, cb);
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host1x_cb->notifier(host1x_cb->notifier_data, 0);
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dma_fence_put(f);
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kfree(host1x_cb);
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}
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int nvgpu_nvhost_intr_register_notifier(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id, u32 thresh,
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void (*notifier)(void *, int),
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void *notifier_data)
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{
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struct dma_fence *fence;
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struct nvgpu_host1x_cb *cb;
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struct host1x_syncpt *sp;
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struct host1x *host1x;
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int err;
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host1x = platform_get_drvdata(nvhost_dev->host1x_pdev);
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if (!host1x)
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return -ENODEV;
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sp = host1x_syncpt_get_by_id_noref(host1x, id);
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if (!sp)
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return -EINVAL;
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fence = host1x_fence_create(sp, thresh);
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if (IS_ERR(fence)) {
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pr_err("error %d during construction of fence!",
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(int)PTR_ERR(fence));
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return PTR_ERR(fence);
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}
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cb = kzalloc(sizeof(*cb), GFP_KERNEL);
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if (!cb)
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return -ENOMEM;
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cb->notifier = notifier;
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cb->notifier_data = notifier_data;
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err = dma_fence_add_callback(fence, &cb->cb, nvgpu_host1x_cb_func);
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if (err < 0) {
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dma_fence_put(fence);
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kfree(cb);
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}
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return err;
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}
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void nvgpu_nvhost_syncpt_set_minval(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id, u32 val)
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{
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struct host1x_syncpt *sp;
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struct host1x *host1x;
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u32 cur;
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host1x = platform_get_drvdata(nvhost_dev->host1x_pdev);
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if (WARN_ON(!host1x))
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return;
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sp = host1x_syncpt_get_by_id_noref(host1x, id);
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if (WARN_ON(!sp))
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return;
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cur = host1x_syncpt_read(sp);
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while (cur++ != val)
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host1x_syncpt_incr(sp);
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}
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void nvgpu_nvhost_syncpt_put_ref_ext(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id)
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{
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struct host1x_syncpt *sp;
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struct host1x *host1x;
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host1x = platform_get_drvdata(nvhost_dev->host1x_pdev);
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if (WARN_ON(!host1x))
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return;
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sp = host1x_syncpt_get_by_id_noref(host1x, id);
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if (WARN_ON(!sp))
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return;
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host1x_syncpt_put(sp);
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}
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u32 nvgpu_nvhost_get_syncpt_client_managed(struct nvgpu_nvhost_dev *nvhost_dev,
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const char *syncpt_name)
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{
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struct host1x_syncpt *sp;
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struct host1x *host1x;
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host1x = platform_get_drvdata(nvhost_dev->host1x_pdev);
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if (!host1x)
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return 0;
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sp = host1x_syncpt_alloc(host1x, HOST1X_SYNCPT_CLIENT_MANAGED,
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syncpt_name);
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if (!sp)
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return 0;
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return host1x_syncpt_id(sp);
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}
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int nvgpu_nvhost_syncpt_wait_timeout_ext(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id, u32 thresh, u32 timeout,
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u32 waiter_index)
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{
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struct host1x_syncpt *sp;
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struct host1x *host1x;
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host1x = platform_get_drvdata(nvhost_dev->host1x_pdev);
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if (!host1x)
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return -ENODEV;
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sp = host1x_syncpt_get_by_id_noref(host1x, id);
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if (!sp)
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return -EINVAL;
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return host1x_syncpt_wait(sp, thresh, timeout, NULL);
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}
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int nvgpu_nvhost_syncpt_read_ext_check(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id, u32 *val)
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{
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struct host1x_syncpt *sp;
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struct host1x *host1x;
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host1x = platform_get_drvdata(nvhost_dev->host1x_pdev);
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if (!host1x)
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return -ENODEV;
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sp = host1x_syncpt_get_by_id_noref(host1x, id);
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if (!sp)
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return -EINVAL;
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*val = host1x_syncpt_read(sp);
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return 0;
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}
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void nvgpu_nvhost_syncpt_set_safe_state(struct nvgpu_nvhost_dev *nvhost_dev,
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u32 id)
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{
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struct host1x_syncpt *sp;
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struct host1x *host1x;
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u32 val, cur;
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host1x = platform_get_drvdata(nvhost_dev->host1x_pdev);
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if (WARN_ON(!host1x))
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return;
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/*
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* Add large number of increments to current value
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* so that all waiters on this syncpoint are released
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*/
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sp = host1x_syncpt_get_by_id_noref(host1x, id);
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if (WARN_ON(!sp))
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return;
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cur = host1x_syncpt_read(sp);
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val = cur + 1000;
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while (cur++ != val)
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host1x_syncpt_incr(sp);
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}
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int nvgpu_nvhost_get_syncpt_aperture(struct nvgpu_nvhost_dev *nvhost_dev,
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u64 *base, size_t *size)
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{
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struct device_node *np = nvhost_dev->host1x_pdev->dev.of_node;
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if (of_device_is_compatible(np, "nvidia,tegra194-host1x")) {
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*base = TEGRA194_SYNCPT_SHIM_BASE;
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*size = TEGRA194_SYNCPT_SHIM_SIZE;
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return 0;
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}
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return -ENOTSUPP;
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}
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u32 nvgpu_nvhost_syncpt_unit_interface_get_byte_offset(struct gk20a *g,
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u32 syncpt_id)
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{
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struct platform_device *host1x_pdev = g->nvhost->host1x_pdev;
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struct device_node *np = host1x_pdev->dev.of_node;
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if (of_device_is_compatible(np, "nvidia,tegra194-host1x"))
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return syncpt_id * TEGRA194_SYNCPT_PAGE_SIZE;
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return 0;
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}
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int nvgpu_nvhost_fence_install(struct nvhost_fence *fence, int fd)
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{
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struct dma_fence *f = (struct dma_fence *)fence;
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struct sync_file *file = sync_file_create(f);
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if (!file)
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return -ENOMEM;
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dma_fence_get(f);
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fd_install(fd, file->file);
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return 0;
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}
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void nvgpu_nvhost_fence_put(struct nvhost_fence *fence)
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{
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dma_fence_put((struct dma_fence *)fence);
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}
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void nvgpu_nvhost_fence_dup(struct nvhost_fence *fence)
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{
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dma_fence_get((struct dma_fence *)fence);
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}
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struct nvhost_fence *nvgpu_nvhost_fence_create(struct platform_device *pdev,
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struct nvhost_ctrl_sync_fence_info *pts,
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u32 num_pts, const char *name)
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{
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struct host1x_syncpt *sp;
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struct host1x *host1x;
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if (num_pts != 1)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
host1x = platform_get_drvdata(pdev);
|
||||
if (!host1x)
|
||||
return ERR_PTR(-ENODEV);
|
||||
|
||||
sp = host1x_syncpt_get_by_id_noref(host1x, pts->id);
|
||||
if (WARN_ON(!sp))
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
return (struct nvhost_fence *)host1x_fence_create(sp, pts->thresh);
|
||||
}
|
||||
|
||||
struct nvhost_fence *nvgpu_nvhost_fence_get(int fd)
|
||||
{
|
||||
return (struct nvhost_fence *)sync_file_get_fence(fd);
|
||||
}
|
||||
|
||||
u32 nvgpu_nvhost_fence_num_pts(struct nvhost_fence *fence)
|
||||
{
|
||||
struct dma_fence_array *array;
|
||||
|
||||
array = to_dma_fence_array((struct dma_fence *)fence);
|
||||
if (!array)
|
||||
return 1;
|
||||
|
||||
return array->num_fences;
|
||||
}
|
||||
|
||||
int nvgpu_nvhost_fence_foreach_pt(struct nvhost_fence *fence,
|
||||
int (*iter)(struct nvhost_ctrl_sync_fence_info, void *),
|
||||
void *data)
|
||||
{
|
||||
struct nvhost_ctrl_sync_fence_info info;
|
||||
struct dma_fence_array *array;
|
||||
int i, err;
|
||||
|
||||
array = to_dma_fence_array((struct dma_fence *)fence);
|
||||
if (!array) {
|
||||
err = host1x_fence_extract((struct dma_fence *)fence, &info.id,
|
||||
&info.thresh);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
return iter(info, data);
|
||||
}
|
||||
|
||||
for (i = 0; i < array->num_fences; ++i) {
|
||||
err = host1x_fence_extract(array->fences[i], &info.id,
|
||||
&info.thresh);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
err = iter(info, data);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -14,7 +14,9 @@
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#if !defined(CONFIG_TEGRA_GK20A_NVHOST_HOST1X)
|
||||
#include <uapi/linux/nvhost_ioctl.h>
|
||||
#endif
|
||||
|
||||
#include <linux/err.h>
|
||||
#include <nvgpu/errno.h>
|
||||
|
||||
Reference in New Issue
Block a user