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gpu: nvgpu: gv11b: init is_fault_engine_subid_gpc ops
*client_type_gpc_v moved from fifo to gmmu JIRA GV11B-7 Change-Id: Icd28a2ac8c0d0ae212cfca9410dfe781972367df Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: http://git-master/r/1313435 Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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@@ -26,6 +26,7 @@
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#include <nvgpu/hw/gv11b/hw_ccsr_gv11b.h>
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#include <nvgpu/hw/gv11b/hw_usermode_gv11b.h>
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#include <nvgpu/hw/gv11b/hw_top_gv11b.h>
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#include <nvgpu/hw/gv11b/hw_gmmu_gv11b.h>
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#include "fifo_gv11b.h"
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#include "subctx_gv11b.h"
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@@ -217,6 +218,11 @@ static u32 gv11b_fifo_get_num_fifos(struct gk20a *g)
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return ccsr_channel__size_1_v();
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}
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static bool gv11b_is_fault_engine_subid_gpc(struct gk20a *g, u32 engine_subid)
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{
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return (engine_subid == gmmu_fault_client_type_gpc_v());
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}
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void gv11b_init_fifo(struct gpu_ops *gops)
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{
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gp10b_init_fifo(gops);
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@@ -234,4 +240,5 @@ void gv11b_init_fifo(struct gpu_ops *gops)
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gops->fifo.eng_runlist_base_size = fifo_eng_runlist_base__size_1_v;
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gops->fifo.free_channel_ctx_header = gv11b_free_subctx_header;
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gops->fifo.device_info_fault_id = top_device_info_data_fault_id_enum_v;
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gops->fifo.is_fault_engine_subid_gpc = gv11b_is_fault_engine_subid_gpc;
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}
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