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gpu: nvgpu: .preempt_tsg move to use runlist_id/tsgid

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It's for making .preempt_tsg reusable on server side.

Jira GVSCI-15770

Change-Id: Id9f477baa29cb63fb0e1d1650f4b1e6a2fa248c0
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2863441
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Ramesh Mylavarapu <rmylavarapu@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Richard Zhao
2023-02-17 15:37:40 -08:00
committed by mobile promotions
parent f20a5b412c
commit 8f5adab299
20 changed files with 90 additions and 62 deletions
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4
userspace/units/fifo/channel/nvgpu-channel.c
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@@ -1536,9 +1536,9 @@ static const char *f_channel_suspend_resume[] = {
"work_completion_cancel_sync",
};
static int stub_fifo_preempt_tsg(struct gk20a *g, struct nvgpu_tsg *tsg)
static int stub_fifo_preempt_tsg(struct gk20a *g, u32 runlist_id, u32 tsgid)
{
stub[0].tsgid = tsg->tsgid;
stub[0].tsgid = tsgid;
return 0;
}

7
userspace/units/fifo/preempt/gv11b/nvgpu-preempt-gv11b.c
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -149,7 +149,7 @@ static int stub_pbdma_handle_intr(struct gk20a *g, u32 pbdma_id, bool recover)
return 0;
}
static int stub_fifo_preempt_tsg(struct gk20a *g, struct nvgpu_tsg *tsg)
static int stub_fifo_preempt_tsg(struct gk20a *g, u32 runlist_id, u32 tsgid)
{
return 1;
}
@@ -276,7 +276,8 @@ int test_gv11b_fifo_preempt_tsg(struct unit_module *m, struct gk20a *g,
branches & F_PREEMPT_TSG_PLATFORM_SILICON ?
true : false;
err = EXPECT_BUG(nvgpu_fifo_preempt_tsg(g, tsg));
err = EXPECT_BUG(nvgpu_fifo_preempt_tsg(g,
tsg->runlist->id, tsg->tsgid));
if (branches & F_PREEMPT_TSG_PREEMPT_LOCKED_FAIL) {
if (branches & F_PREEMPT_TSG_PLATFORM_SILICON) {

6
userspace/units/fifo/preempt/nvgpu-preempt.c
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2021, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -106,9 +106,9 @@ static int stub_fifo_preempt_channel(struct gk20a *g, struct nvgpu_channel *ch)
return 0;
}
static int stub_fifo_preempt_tsg(struct gk20a *g, struct nvgpu_tsg *tsg)
static int stub_fifo_preempt_tsg(struct gk20a *g, u32 runlist_id, u32 tsgid)
{
stub[0].tsgid = tsg->tsgid;
stub[0].tsgid = tsgid;
return 0;
}

6
userspace/units/fifo/tsg/nvgpu-tsg.c
View File

@@ -418,7 +418,7 @@ done:
#define F_TSG_UNBIND_CHANNEL_LAST BIT(9)
static int stub_fifo_preempt_tsg_EINVAL(
struct gk20a *g, struct nvgpu_tsg *tsg)
struct gk20a *g, u32 runlist_id, u32 tsgid)
{
return -EINVAL;
}
@@ -1305,9 +1305,9 @@ static const char *f_tsg_abort[] = {
"non_referenceable"
};
static int stub_fifo_preempt_tsg(struct gk20a *g, struct nvgpu_tsg *tsg)
static int stub_fifo_preempt_tsg(struct gk20a *g, u32 runlist_id, u32 tsgid)
{
stub[0].tsgid = tsg->tsgid;
stub[0].tsgid = tsgid;
return 0;
}

7
userspace/units/gr/setup/nvgpu-gr-setup.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -75,8 +75,7 @@ struct gr_gops_org {
int (*wait_idle)(struct gk20a *g);
int (*ctrl_ctxsw)(struct gk20a *g, u32 fecs_method,
u32 data, u32 *ret_val);
int (*fifo_preempt_tsg)(struct gk20a *g,
struct nvgpu_tsg *tsg);
int (*fifo_preempt_tsg)(struct gk20a *g, u32 runlist_id, u32 tsgid);
bool (*is_valid)(u32 class_num);
bool (*is_valid_compute)(u32 class_num);
};
@@ -129,7 +128,7 @@ static int stub_gr_falcon_ctrl_ctxsw(struct gk20a *g, u32 fecs_method,
return 0;
}
static int stub_gr_fifo_preempt_tsg(struct gk20a *g, struct nvgpu_tsg *tsg)
static int stub_gr_fifo_preempt_tsg(struct gk20a *g, u32 runlist_id, u32 tsgid)
{
return -1;
}